From a953ff384aab119ea4fb84931cf5ae283f40f521 Mon Sep 17 00:00:00 2001 From: Andrew Waterman Date: Tue, 12 Jan 2016 15:30:26 -0800 Subject: [PATCH] Chisel3 compatibility: use more concrete types --- uncore/src/main/scala/cache.scala | 2 +- uncore/src/main/scala/util.scala | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/uncore/src/main/scala/cache.scala b/uncore/src/main/scala/cache.scala index 30624309..89176769 100644 --- a/uncore/src/main/scala/cache.scala +++ b/uncore/src/main/scala/cache.scala @@ -80,7 +80,7 @@ class PseudoLRU(n: Int) def access(way: UInt) { state_reg := get_next_state(state_reg,way) } - def get_next_state(state: Bits, way: UInt) = { + def get_next_state(state: UInt, way: UInt) = { var next_state = state var idx = UInt(1,1) for (i <- log2Up(n)-1 to 0 by -1) { diff --git a/uncore/src/main/scala/util.scala b/uncore/src/main/scala/util.scala index db1dd6f4..cc5036bf 100644 --- a/uncore/src/main/scala/util.scala +++ b/uncore/src/main/scala/util.scala @@ -18,7 +18,7 @@ object MuxBundle { mapping.reverse.foldLeft(default)((b, a) => Mux(a._1, a._2, b)) } - def apply[S <: Data, T <: Data] (key: S, default: T, mapping: Seq[(S, T)]): T = { + def apply[T <: Data] (key: UInt, default: T, mapping: Seq[(UInt, T)]): T = { apply(default, mapping.map{ case (a, b) => (a === key, b) }) } }