From a7ae7e5758eea704ed284667df0295e9b304a30c Mon Sep 17 00:00:00 2001 From: Henry Cook Date: Thu, 28 Feb 2013 19:49:05 -0800 Subject: [PATCH] Cleaned up self-probes --- uncore/src/coherence.scala | 7 +++++++ uncore/src/uncore.scala | 11 +++-------- 2 files changed, 10 insertions(+), 8 deletions(-) diff --git a/uncore/src/coherence.scala b/uncore/src/coherence.scala index effba2e9..f7a75afc 100644 --- a/uncore/src/coherence.scala +++ b/uncore/src/coherence.scala @@ -49,6 +49,7 @@ abstract class CoherencePolicy { def needsMemRead(a_type: UFix, global_state: UFix): Bool def needsMemWrite(a_type: UFix, global_state: UFix): Bool def needsAckReply(a_type: UFix, global_state: UFix): Bool + def needsSelfProbe(acq: Acquire): Bool def requiresAck(grant: Grant): Bool def requiresAck(release: Release): Bool def pendingVoluntaryReleaseIsSufficient(r_type: UFix, p_type: UFix): Bool @@ -79,6 +80,7 @@ abstract class IncoherentPolicy extends CoherencePolicy { def needsMemRead(a_type: UFix, global_state: UFix): Bool = Bool(false) def needsMemWrite(a_type: UFix, global_state: UFix): Bool = Bool(false) def needsAckReply(a_type: UFix, global_state: UFix): Bool = Bool(false) + def needsSelfProbe(acq: Acquire) = Bool(false) def requiresAck(grant: Grant) = Bool(true) def requiresAck(release: Release) = Bool(false) def pendingVoluntaryReleaseIsSufficient(r_type: UFix, p_type: UFix): Bool = Bool(false) @@ -268,6 +270,7 @@ class MICoherence extends CoherencePolicyWithUncached { } def requiresAck(grant: Grant) = Bool(true) def requiresAck(release: Release) = Bool(false) + def needsSelfProbe(acq: Acquire) = acq.a_type === acquireReadUncached def pendingVoluntaryReleaseIsSufficient(r_type: UFix, p_type: UFix): Bool = (r_type === releaseVoluntaryInvalidateData) } @@ -421,6 +424,7 @@ class MEICoherence extends CoherencePolicyWithUncached { } def requiresAck(grant: Grant) = Bool(true) def requiresAck(release: Release) = Bool(false) + def needsSelfProbe(acq: Acquire) = acq.a_type === acquireReadUncached def pendingVoluntaryReleaseIsSufficient(r_type: UFix, p_type: UFix): Bool = (r_type === releaseVoluntaryInvalidateData) } @@ -578,6 +582,7 @@ class MSICoherence extends CoherencePolicyWithUncached { } def requiresAck(grant: Grant) = Bool(true) def requiresAck(release: Release) = Bool(false) + def needsSelfProbe(acq: Acquire) = acq.a_type === acquireReadUncached def pendingVoluntaryReleaseIsSufficient(r_type: UFix, p_type: UFix): Bool = (r_type === releaseVoluntaryInvalidateData) } @@ -740,6 +745,7 @@ class MESICoherence extends CoherencePolicyWithUncached { def requiresAck(grant: Grant) = Bool(true) def requiresAck(release: Release) = Bool(false) + def needsSelfProbe(acq: Acquire) = acq.a_type === acquireReadUncached def pendingVoluntaryReleaseIsSufficient(r_type: UFix, p_type: UFix): Bool = (r_type === releaseVoluntaryInvalidateData) } @@ -918,6 +924,7 @@ class MigratoryCoherence extends CoherencePolicyWithUncached { } def requiresAck(grant: Grant) = Bool(true) def requiresAck(release: Release) = Bool(false) + def needsSelfProbe(acq: Acquire) = acq.a_type === acquireReadUncached def pendingVoluntaryReleaseIsSufficient(r_type: UFix, p_type: UFix): Bool = (r_type === releaseVoluntaryInvalidateData) } diff --git a/uncore/src/uncore.scala b/uncore/src/uncore.scala index 8d1d396d..e3ebbc07 100644 --- a/uncore/src/uncore.scala +++ b/uncore/src/uncore.scala @@ -105,14 +105,9 @@ class XactTrackerBroadcast(id: Int)(implicit conf: CoherenceHubConfiguration) ex val probe_initial_flags = Bits(width = conf.ln.nTiles) probe_initial_flags := Bits(0) if (conf.ln.nTiles > 1) { - // issue self-probes for uncached read xacts to facilitate I$ coherence - // TODO: this is hackish; figure out how to do it more systematically - val probe_self = co match { - case u: CoherencePolicyWithUncached => u.isUncachedReadTransaction(io.alloc_req.bits.acquire) - case _ => Bool(false) - } - val myflag = Mux(probe_self, Bits(0), UFixToOH(io.alloc_req.bits.client_id(log2Up(conf.ln.nTiles)-1,0))) - probe_initial_flags := ~(io.tile_incoherent | myflag) + val probe_self = co.needsSelfProbe(io.alloc_req.bits.acquire) + val probe_self_flag = Mux(probe_self, Bits(0), UFixToOH(io.alloc_req.bits.client_id(log2Up(conf.ln.nTiles)-1,0))) + probe_initial_flags := ~(io.tile_incoherent | probe_self_flag) } io.busy := state != s_idle