tilelink2: change adapters to use TLAdapter(params, defaults)(node)

This API makes it much more readable when you have multiple adapters
combined into a single line. The arguments for each adapter stay
beside the adapter.

For example, this:
  peripheryBus.node := TLWidthWidget(TLBuffer(TLAtomicAutomata()(TLHintHandler(legacy.node))), legacy.tlDataBytes)
becomes this:
  peripheryBus.node := TLWidthWidget(legacy.tlDataBytes)(TLBuffer()(TLAtomicAutomata()(TLHintHandler()(legacy.node))))

src/main/scala/rocketchip/BaseTop.scala

@@ -49,7 +49,7 @@ abstract class BaseTop(q: Parameters) extends LazyModule {
 
   val legacy = LazyModule(new TLLegacy()(p.alterPartial({ case TLId => "L2toMMIO" })))
 
-  peripheryBus.node := TLWidthWidget(TLBuffer(TLAtomicAutomata()(TLHintHandler(legacy.node))), legacy.tlDataBytes)
+  peripheryBus.node := TLWidthWidget(legacy.tlDataBytes)(TLBuffer()(TLAtomicAutomata()(TLHintHandler()(legacy.node))))
 }
 
 abstract class BaseTopBundle(val p: Parameters) extends Bundle {

src/main/scala/rocketchip/Periphery.scala

@@ -288,7 +288,7 @@ trait PeripheryCoreplexLocalInterrupter extends LazyModule with HasPeripheryPara
   val clintConfig = CoreplexLocalInterrupterConfig(beatBytes)
   val clint = LazyModule(new CoreplexLocalInterrupter(clintConfig)(innerMMIOParams))
   // The periphery bus is 32-bit, so we may need to adapt its width to XLen
-  clint.node := TLFragmenter(TLWidthWidget(peripheryBus.node, 4), beatBytes, 256)
+  clint.node := TLFragmenter(beatBytes, 256)(TLWidthWidget(4)(peripheryBus.node))
 }
 
 trait PeripheryCoreplexLocalInterrupterBundle {
@@ -314,7 +314,7 @@ trait PeripheryBootROM extends LazyModule {
   val address = 0x1000
   val size = 0x1000
   val rom = LazyModule(new TLROM(address, size, GenerateBootROM(p, address)) { override def name = "bootrom" })
-  rom.node := TLFragmenter(peripheryBus.node, 4, 256)
+  rom.node := TLFragmenter(4, 256)(peripheryBus.node)
 }
 
 trait PeripheryBootROMBundle {
@@ -337,7 +337,7 @@ trait PeripheryTestRAM extends LazyModule {
   val ramSize = 0x1000
 
   val sram = LazyModule(new TLRAM(AddressSet(ramBase, ramSize-1)) { override def name = "testram" })
-  sram.node := TLFragmenter(peripheryBus.node, 4, 256)
+  sram.node := TLFragmenter(4, 256)(peripheryBus.node)
 }
 
 trait PeripheryTestRAMBundle {

src/main/scala/uncore/tilelink2/Buffer.scala

@@ -48,12 +48,12 @@ class TLBuffer(a: Int = 2, b: Int = 2, c: Int = 2, d: Int = 2, e: Int = 2, pipe:
 object TLBuffer
 {
   // applied to the TL source node; y.node := TLBuffer(x.node)
-  def apply(x: TLBaseNode)                                  (implicit sourceInfo: SourceInfo): TLBaseNode = apply(x, 2)
+  def apply()                                (x: TLBaseNode)(implicit sourceInfo: SourceInfo): TLBaseNode = apply(2)(x)
-  def apply(x: TLBaseNode, entries: Int)                    (implicit sourceInfo: SourceInfo): TLBaseNode = apply(x, entries, true)
+  def apply(entries: Int)                    (x: TLBaseNode)(implicit sourceInfo: SourceInfo): TLBaseNode = apply(entries, true)(x)
-  def apply(x: TLBaseNode, entries: Int, pipe: Boolean)     (implicit sourceInfo: SourceInfo): TLBaseNode = apply(x, entries, entries, pipe)
+  def apply(entries: Int, pipe: Boolean)     (x: TLBaseNode)(implicit sourceInfo: SourceInfo): TLBaseNode = apply(entries, entries, pipe)(x)
-  def apply(x: TLBaseNode, ace: Int, bd: Int)               (implicit sourceInfo: SourceInfo): TLBaseNode = apply(x, ace, bd, true)
+  def apply(ace: Int, bd: Int)               (x: TLBaseNode)(implicit sourceInfo: SourceInfo): TLBaseNode = apply(ace, bd, true)(x)
-  def apply(x: TLBaseNode, ace: Int, bd: Int, pipe: Boolean)(implicit sourceInfo: SourceInfo): TLBaseNode = apply(x, ace, bd, ace, bd, ace, pipe)
+  def apply(ace: Int, bd: Int, pipe: Boolean)(x: TLBaseNode)(implicit sourceInfo: SourceInfo): TLBaseNode = apply(ace, bd, ace, bd, ace, pipe)(x)
-  def apply(x: TLBaseNode, a: Int, b: Int, c: Int, d: Int, e: Int, pipe: Boolean = true)(implicit sourceInfo: SourceInfo): TLBaseNode = {
+  def apply(a: Int, b: Int, c: Int, d: Int, e: Int, pipe: Boolean = true)(x: TLBaseNode)(implicit sourceInfo: SourceInfo): TLBaseNode = {
     val buffer = LazyModule(new TLBuffer(a, b, c, d, e, pipe))
     buffer.node := x
     buffer.node

src/main/scala/uncore/tilelink2/Fragmenter.scala

@@ -244,7 +244,7 @@ class TLFragmenter(minSize: Int, maxSize: Int, alwaysMin: Boolean = false) exten
 object TLFragmenter
 {
   // applied to the TL source node; y.node := TLFragmenter(x.node, 256, 4)
-  def apply(x: TLBaseNode, minSize: Int, maxSize: Int, alwaysMin: Boolean = false)(implicit sourceInfo: SourceInfo): TLBaseNode = {
+  def apply(minSize: Int, maxSize: Int, alwaysMin: Boolean = false)(x: TLBaseNode)(implicit sourceInfo: SourceInfo): TLBaseNode = {
     val fragmenter = LazyModule(new TLFragmenter(minSize, maxSize, alwaysMin))
     fragmenter.node := x
     fragmenter.node

src/main/scala/uncore/tilelink2/Fuzzer.scala

@@ -222,11 +222,11 @@ class TLFuzzRAM extends LazyModule
 
   model.node := fuzz.node
   xbar2.node := TLAtomicAutomata()(model.node)
-  ram2.node := TLFragmenter(xbar2.node, 16, 256)
+  ram2.node := TLFragmenter(16, 256)(xbar2.node)
-  xbar.node := TLWidthWidget(TLHintHandler(xbar2.node), 16)
+  xbar.node := TLWidthWidget(16)(TLHintHandler()(xbar2.node))
-  cross.node := TLFragmenter(TLBuffer(xbar.node), 4, 256)
+  cross.node := TLFragmenter(4, 256)(TLBuffer()(xbar.node))
   val monitor = (ram.node := cross.node)
-  gpio.node := TLFragmenter(TLBuffer(xbar.node), 4, 32)
+  gpio.node := TLFragmenter(4, 32)(TLBuffer()(xbar.node))
 
   lazy val module = new LazyModuleImp(this) with HasUnitTestIO {
     io.finished := fuzz.module.io.finished

src/main/scala/uncore/tilelink2/HintHandler.scala

@@ -135,7 +135,7 @@ class TLHintHandler(supportManagers: Boolean = true, supportClients: Boolean = f
 object TLHintHandler
 {
   // applied to the TL source node; y.node := TLHintHandler(x.node)
-  def apply(x: TLBaseNode, supportManagers: Boolean = true, supportClients: Boolean = false, passthrough: Boolean = true)(implicit sourceInfo: SourceInfo): TLBaseNode = {
+  def apply(supportManagers: Boolean = true, supportClients: Boolean = false, passthrough: Boolean = true)(x: TLBaseNode)(implicit sourceInfo: SourceInfo): TLBaseNode = {
     val hints = LazyModule(new TLHintHandler(supportManagers, supportClients, passthrough))
     hints.node := x
     hints.node

src/main/scala/uncore/tilelink2/WidthWidget.scala

@@ -174,7 +174,7 @@ class TLWidthWidget(innerBeatBytes: Int) extends LazyModule
 object TLWidthWidget
 {
   // applied to the TL source node; y.node := WidthWidget(x.node, 16)
-  def apply(x: TLBaseNode, innerBeatBytes: Int)(implicit sourceInfo: SourceInfo): TLBaseNode = {
+  def apply(innerBeatBytes: Int)(x: TLBaseNode)(implicit sourceInfo: SourceInfo): TLBaseNode = {
     val widget = LazyModule(new TLWidthWidget(innerBeatBytes))
     widget.node := x
     widget.node