diff --git a/rocket/src/main/scala/tile.scala b/rocket/src/main/scala/tile.scala
index 2ebabc7d..1b7f6e05 100644
--- a/rocket/src/main/scala/tile.scala
+++ b/rocket/src/main/scala/tile.scala
@@ -13,12 +13,11 @@ class Tile extends Component
   
   val cpu       = new rocketProc(resetSignal = io.host.reset)
   val icache    = new rocketICache(128, 4) // 128 sets x 4 ways (32KB)
-  val icache_pf = new rocketIPrefetcher
   val dcache    = new HellaCacheUniproc
 
   val arbiter   = new rocketMemArbiter(2 + (if (HAVE_VEC) 1 else 0))
   arbiter.io.requestor(0) <> dcache.io.mem
-  arbiter.io.requestor(1) <> icache_pf.io.mem
+  arbiter.io.requestor(1) <> icache.io.mem
 
   io.tilelink.xact_init <> Queue(arbiter.io.mem.xact_init)
   io.tilelink.xact_init_data <> Queue(dcache.io.mem.xact_init_data)
@@ -38,8 +37,6 @@ class Tile extends Component
 
   cpu.io.host       <> io.host
 
-  icache_pf.io.invalidate := cpu.io.imem.invalidate
-  icache.io.mem     <> icache_pf.io.icache
   cpu.io.imem       <> icache.io.cpu
   cpu.io.dmem       <> dcache.io.cpu
 }