diff --git a/uncore/src/main/scala/cache.scala b/uncore/src/main/scala/cache.scala index d871e652..0e963f24 100644 --- a/uncore/src/main/scala/cache.scala +++ b/uncore/src/main/scala/cache.scala @@ -118,7 +118,7 @@ trait HasL2InternalRequestState extends L2HellaCacheBundle { } object L2Metadata { - def apply(tag: Bits, coh: MasterMetadata) = { + def apply(tag: Bits, coh: ManagerMetadata) = { val meta = new L2Metadata meta.tag := tag meta.coh := coh @@ -126,7 +126,7 @@ object L2Metadata { } } class L2Metadata extends Metadata with L2HellaCacheParameters { - val coh = new MasterMetadata + val coh = new ManagerMetadata } class L2MetaReadReq extends MetaReadReq with HasL2Id { @@ -156,7 +156,7 @@ class L2MetaRWIO extends L2HellaCacheBundle with HasL2MetaReadIO with HasL2MetaW class L2MetadataArray extends L2HellaCacheModule { val io = new L2MetaRWIO().flip - val meta = Module(new MetadataArray(() => L2Metadata(UInt(0), co.masterMetadataOnFlush))) + val meta = Module(new MetadataArray(() => L2Metadata(UInt(0), co.managerMetadataOnFlush))) meta.io.read <> io.read meta.io.write <> io.write @@ -322,7 +322,7 @@ class TSHRFile(bankId: Int, innerId: String, outerId: String) extends L2HellaCac // Wire finished transaction acks val finish = io.inner.finish - val finish_idx = finish.bits.payload.master_xact_id + val finish_idx = finish.bits.payload.manager_xact_id trackerList.zipWithIndex.map { case (t, i) => t.io.inner.finish.valid := finish.valid && finish_idx === UInt(i) } @@ -355,7 +355,7 @@ class TSHRFile(bankId: Int, innerId: String, outerId: String) extends L2HellaCac class L2WritebackReq extends L2HellaCacheBundle with HasL2Id { val addr = UInt(width = tlAddrBits) - val coh = new MasterMetadata + val coh = new ManagerMetadata val way_en = Bits(width = nWays) } @@ -385,7 +385,7 @@ class L2WritebackUnit(trackerId: Int, bankId: Int, innerId: String, outerId: Str val state = Reg(init=s_idle) val xact_addr = Reg(io.inner.acquire.bits.payload.addr.clone) - val xact_coh = Reg{ new MasterMetadata } + val xact_coh = Reg{ new ManagerMetadata } val xact_way_en = Reg{ Bits(width = nWays) } val xact_data = Vec.fill(tlDataBeats){ Reg(io.inner.acquire.bits.payload.data.clone) } val xact_id = Reg{ UInt() } @@ -406,7 +406,7 @@ class L2WritebackUnit(trackerId: Int, bankId: Int, innerId: String, outerId: Str co.isCoherenceConflict(xact_addr, c_rel.payload.addr) && (state === s_probe) - val next_coh_on_rel = co.masterMetadataOnRelease(c_rel.payload, xact_coh, c_rel.header.src) + val next_coh_on_rel = co.managerMetadataOnRelease(c_rel.payload, xact_coh, c_rel.header.src) io.outer.acquire.valid := Bool(false) io.outer.acquire.bits.payload := Bundle(UncachedWrite(xact_addr, @@ -577,7 +577,7 @@ class L2VoluntaryReleaseTracker(trackerId: Int, bankId: Int, innerId: String, ou io.meta.write.bits.idx := xact_addr(idxMSB,idxLSB) io.meta.write.bits.way_en := xact_way_en io.meta.write.bits.data.tag := xact_addr >> UInt(idxBits) - io.meta.write.bits.data.coh := co.masterMetadataOnRelease(xact, + io.meta.write.bits.data.coh := co.managerMetadataOnRelease(xact, xact_meta.coh, xact_src) io.wb.req.valid := Bool(false) @@ -701,8 +701,8 @@ class L2AcquireTracker(trackerId: Int, bankId: Int, innerId: String, outerId: St (xact.addr === c_rel.payload.addr) && (state === s_probe) - val next_coh_on_rel = co.masterMetadataOnRelease(c_rel.payload, xact_meta.coh, c_rel.header.src) - val next_coh_on_gnt = co.masterMetadataOnGrant(c_gnt.payload, xact_meta.coh, + val next_coh_on_rel = co.managerMetadataOnRelease(c_rel.payload, xact_meta.coh, c_rel.header.src) + val next_coh_on_gnt = co.managerMetadataOnGrant(c_gnt.payload, xact_meta.coh, c_gnt.header.dst) val outer_write = Bundle(UncachedWrite(xact_addr, UInt(trackerId), xact_data(outer_data_write_cnt)), diff --git a/uncore/src/main/scala/coherence.scala b/uncore/src/main/scala/coherence.scala index c7999f4b..08d7cf20 100644 --- a/uncore/src/main/scala/coherence.scala +++ b/uncore/src/main/scala/coherence.scala @@ -3,6 +3,8 @@ package uncore import Chisel._ + +// Classes to represent coherence information in clients and managers abstract class CoherenceMetadata extends Bundle with CoherenceAgentParameters class ClientMetadata extends CoherenceMetadata { @@ -18,21 +20,23 @@ object ClientMetadata { } } -class MasterMetadata extends CoherenceMetadata { +class ManagerMetadata extends CoherenceMetadata { val state = UInt(width = co.masterStateWidth) val sharers = UInt(width = co.dir.width) - override def clone = new MasterMetadata().asInstanceOf[this.type] + override def clone = new ManagerMetadata().asInstanceOf[this.type] } -object MasterMetadata { +object ManagerMetadata { def apply(state: UInt, sharers: UInt) = { - val m = new MasterMetadata + val m = new ManagerMetadata m.state := state m.sharers := sharers m } - def apply(state: UInt): MasterMetadata = apply(state, new MasterMetadata().co.dir.flush) + def apply(state: UInt): ManagerMetadata = apply(state, new ManagerMetadata().co.dir.flush) } +// This class encapsulates transformations on different directory information +// storage formats abstract class DirectoryRepresentation(val width: Int) { def pop(prev: UInt, id: UInt): UInt def push(prev: UInt, id: UInt): UInt @@ -66,15 +70,16 @@ class FullRepresentation(nClients: Int) extends DirectoryRepresentation(nClients def full(s: UInt) = s } +// Coherence policy inferface for clients and managers abstract class CoherencePolicy(val dir: DirectoryRepresentation) { def nClientStates: Int - def nMasterStates: Int + def nManagerStates: Int def nAcquireTypes: Int def nProbeTypes: Int def nReleaseTypes: Int def nGrantTypes: Int def clientStateWidth = log2Up(nClientStates) - def masterStateWidth = log2Up(nMasterStates) + def masterStateWidth = log2Up(nManagerStates) def acquireTypeWidth = log2Up(nAcquireTypes) def probeTypeWidth = log2Up(nProbeTypes) def releaseTypeWidth = log2Up(nReleaseTypes) @@ -82,49 +87,48 @@ abstract class CoherencePolicy(val dir: DirectoryRepresentation) { def isHit (cmd: UInt, m: ClientMetadata): Bool def isValid (m: ClientMetadata): Bool - def isHit (incoming: Acquire, m: MasterMetadata): Bool - def isValid (m: MasterMetadata): Bool + def isHit (incoming: Acquire, m: ManagerMetadata): Bool + def isValid (m: ManagerMetadata): Bool def needsTransactionOnSecondaryMiss(cmd: UInt, outstanding: Acquire): Bool def needsTransactionOnCacheControl(cmd: UInt, m: ClientMetadata): Bool def needsWriteback(m: ClientMetadata): Bool - def needsWriteback(m: MasterMetadata): Bool + def needsWriteback(m: ManagerMetadata): Bool def clientMetadataOnHit(cmd: UInt, m: ClientMetadata): ClientMetadata def clientMetadataOnCacheControl(cmd: UInt): ClientMetadata def clientMetadataOnFlush: ClientMetadata def clientMetadataOnGrant(incoming: Grant, outstanding: Acquire): ClientMetadata def clientMetadataOnProbe(incoming: Probe, m: ClientMetadata): ClientMetadata - def masterMetadataOnFlush: MasterMetadata - def masterMetadataOnRelease(incoming: Release, m: MasterMetadata, src: UInt): MasterMetadata - def masterMetadataOnGrant(outgoing: Grant, m: MasterMetadata, dst: UInt): MasterMetadata + def managerMetadataOnFlush: ManagerMetadata + def managerMetadataOnRelease(incoming: Release, m: ManagerMetadata, src: UInt): ManagerMetadata + def managerMetadataOnGrant(outgoing: Grant, m: ManagerMetadata, dst: UInt): ManagerMetadata def getAcquireTypeOnPrimaryMiss(cmd: UInt, m: ClientMetadata): UInt def getAcquireTypeOnSecondaryMiss(cmd: UInt, m: ClientMetadata, outstanding: Acquire): UInt - def getProbeType(a: Acquire, m: MasterMetadata): UInt + def getProbeType(a: Acquire, m: ManagerMetadata): UInt def getProbeTypeOnVoluntaryWriteback: UInt def getReleaseTypeOnCacheControl(cmd: UInt): UInt def getReleaseTypeOnVoluntaryWriteback(): UInt def getReleaseTypeOnProbe(p: Probe, m: ClientMetadata): UInt - def getGrantType(a: Acquire, m: MasterMetadata): UInt - def getGrantTypeOnVoluntaryWriteback(m: MasterMetadata): UInt + def getGrantType(a: Acquire, m: ManagerMetadata): UInt + def getGrantTypeOnVoluntaryWriteback(m: ManagerMetadata): UInt - def messageHasData(rel: SourcedMessage): Bool + def messageHasData(rel: TileLinkChannel): Bool def messageUpdatesDataArray(g: Grant): Bool def isVoluntary(rel: Release): Bool def isVoluntary(gnt: Grant): Bool - def requiresOuterRead(acq: Acquire, m: MasterMetadata): Bool - def requiresOuterWrite(acq: Acquire, m: MasterMetadata): Bool + def requiresOuterRead(acq: Acquire, m: ManagerMetadata): Bool + def requiresOuterWrite(acq: Acquire, m: ManagerMetadata): Bool def requiresSelfProbe(a: Acquire): Bool - def requiresProbes(a: Acquire, m: MasterMetadata): Bool - def requiresProbesOnVoluntaryWriteback(m: MasterMetadata): Bool + def requiresProbes(a: Acquire, m: ManagerMetadata): Bool + def requiresProbesOnVoluntaryWriteback(m: ManagerMetadata): Bool def requiresAckForGrant(g: Grant): Bool def requiresAckForRelease(r: Release): Bool - def pendingVoluntaryReleaseIsSufficient(r_type: UInt, p_type: UInt): Bool def isCoherenceConflict(addr1: UInt, addr2: UInt): Bool - def getGrantTypeForUncached(a: Acquire, m: MasterMetadata): UInt = { + def getGrantTypeForUncached(a: Acquire, m: ManagerMetadata): UInt = { MuxLookup(a.a_type, Grant.uncachedRead, Array( Acquire.uncachedRead -> Grant.uncachedRead, Acquire.uncachedWrite -> Grant.uncachedWrite, @@ -135,14 +139,14 @@ abstract class CoherencePolicy(val dir: DirectoryRepresentation) { class MICoherence(dir: DirectoryRepresentation) extends CoherencePolicy(dir) { def nClientStates = 2 - def nMasterStates = 2 + def nManagerStates = 2 def nAcquireTypes = 1 def nProbeTypes = 2 def nReleaseTypes = 5 def nGrantTypes = 2 val clientInvalid :: clientValid :: Nil = Enum(UInt(), nClientStates) - val masterInvalid :: masterValid :: Nil = Enum(UInt(), nMasterStates) + val masterInvalid :: masterValid :: Nil = Enum(UInt(), nManagerStates) val acquireReadExclusive :: Nil = Enum(UInt(), nAcquireTypes) val probeInvalidate :: probeCopy :: Nil = Enum(UInt(), nProbeTypes) @@ -154,8 +158,8 @@ class MICoherence(dir: DirectoryRepresentation) extends CoherencePolicy(dir) { def isHit (cmd: UInt, m: ClientMetadata): Bool = isValid(m) def isValid (m: ClientMetadata): Bool = m.state != clientInvalid - def isHit (incoming: Acquire, m: MasterMetadata): Bool = isValid(m) - def isValid (m: MasterMetadata): Bool = m.state != masterInvalid + def isHit (incoming: Acquire, m: ManagerMetadata): Bool = isValid(m) + def isValid (m: ManagerMetadata): Bool = m.state != masterInvalid def needsTransactionOnSecondaryMiss(cmd: UInt, outstanding: Acquire): Bool = (outstanding.a_type != acquireReadExclusive) def needsTransactionOnCacheControl(cmd: UInt, m: ClientMetadata): Bool = { @@ -167,7 +171,7 @@ class MICoherence(dir: DirectoryRepresentation) extends CoherencePolicy(dir) { def needsWriteback (m: ClientMetadata): Bool = { needsTransactionOnCacheControl(M_INV, m) } - def needsWriteback(m: MasterMetadata) = isValid(m) + def needsWriteback(m: ManagerMetadata) = isValid(m) def clientMetadataOnHit(cmd: UInt, m: ClientMetadata) = m def clientMetadataOnCacheControl(cmd: UInt) = ClientMetadata( @@ -183,18 +187,18 @@ class MICoherence(dir: DirectoryRepresentation) extends CoherencePolicy(dir) { probeInvalidate -> clientInvalid, probeCopy -> m.state ))) - def masterMetadataOnFlush = MasterMetadata(masterInvalid) - def masterMetadataOnRelease(r: Release, m: MasterMetadata, src: UInt) = { - val next = MasterMetadata(masterValid, dir.pop(m.sharers, src)) + def managerMetadataOnFlush = ManagerMetadata(masterInvalid) + def managerMetadataOnRelease(r: Release, m: ManagerMetadata, src: UInt) = { + val next = ManagerMetadata(masterValid, dir.pop(m.sharers, src)) MuxBundle(m, Array( r.is(releaseVoluntaryInvalidateData) -> next, r.is(releaseInvalidateData) -> next, r.is(releaseInvalidateAck) -> next )) } - def masterMetadataOnGrant(g: Grant, m: MasterMetadata, dst: UInt) = { - val cached = MasterMetadata(masterValid, dir.push(m.sharers, dst)) - val uncached = MasterMetadata(masterValid, m.sharers) + def managerMetadataOnGrant(g: Grant, m: ManagerMetadata, dst: UInt) = { + val cached = ManagerMetadata(masterValid, dir.push(m.sharers, dst)) + val uncached = ManagerMetadata(masterValid, m.sharers) Mux(g.uncached, uncached, cached) } @@ -217,7 +221,7 @@ class MICoherence(dir: DirectoryRepresentation) extends CoherencePolicy(dir) { Mux(needsWriteback(m), with_data, without_data) } - def messageHasData(msg: SourcedMessage) = msg match { + def messageHasData(msg: TileLinkChannel) = msg match { case acq: Acquire => Mux(acq.uncached, Acquire.hasData(acq.a_type), Bool(false)) case gnt: Grant => Mux(gnt.uncached, Grant.hasData(gnt.g_type), hasDataGrantTypeVec.contains(gnt.g_type)) case rel: Release => hasDataReleaseTypeVec.contains(rel.r_type) @@ -230,12 +234,12 @@ class MICoherence(dir: DirectoryRepresentation) extends CoherencePolicy(dir) { def isCoherenceConflict(addr1: UInt, addr2: UInt): Bool = (addr1 === addr2) - def getGrantType(a: Acquire, m: MasterMetadata): UInt = + def getGrantType(a: Acquire, m: ManagerMetadata): UInt = Mux(a.uncached, getGrantTypeForUncached(a, m), grantReadExclusive) - def getGrantTypeOnVoluntaryWriteback(m: MasterMetadata): UInt = grantVoluntaryAck + def getGrantTypeOnVoluntaryWriteback(m: ManagerMetadata): UInt = grantVoluntaryAck - def getProbeType(a: Acquire, m: MasterMetadata): UInt = { + def getProbeType(a: Acquire, m: ManagerMetadata): UInt = { Mux(a.uncached, MuxLookup(a.a_type, probeCopy, Array( Acquire.uncachedRead -> probeCopy, @@ -245,29 +249,28 @@ class MICoherence(dir: DirectoryRepresentation) extends CoherencePolicy(dir) { } def getProbeTypeOnVoluntaryWriteback: UInt = probeInvalidate - def requiresOuterRead(acq: Acquire, m: MasterMetadata) = + def requiresOuterRead(acq: Acquire, m: ManagerMetadata) = Mux(acq.uncached, Acquire.requiresOuterRead(acq.a_type), Bool(true)) - def requiresOuterWrite(acq: Acquire, m: MasterMetadata) = + def requiresOuterWrite(acq: Acquire, m: ManagerMetadata) = Mux(acq.uncached, Acquire.requiresOuterWrite(acq.a_type), Bool(false)) def requiresAckForGrant(g: Grant) = g.uncached || g.g_type != grantVoluntaryAck def requiresAckForRelease(r: Release) = Bool(false) def requiresSelfProbe(a: Acquire) = a.uncached && a.a_type === Acquire.uncachedRead - def requiresProbes(a: Acquire, m: MasterMetadata) = !dir.none(m.sharers) - def requiresProbesOnVoluntaryWriteback(m: MasterMetadata) = !dir.none(m.sharers) - def pendingVoluntaryReleaseIsSufficient(r_type: UInt, p_type: UInt): Bool = (r_type === releaseVoluntaryInvalidateData) + def requiresProbes(a: Acquire, m: ManagerMetadata) = !dir.none(m.sharers) + def requiresProbesOnVoluntaryWriteback(m: ManagerMetadata) = !dir.none(m.sharers) } class MEICoherence(dir: DirectoryRepresentation) extends CoherencePolicy(dir) { def nClientStates = 3 - def nMasterStates = 2 + def nManagerStates = 2 def nAcquireTypes = 2 def nProbeTypes = 3 def nReleaseTypes = 7 def nGrantTypes = 2 val clientInvalid :: clientExclusiveClean :: clientExclusiveDirty :: Nil = Enum(UInt(), nClientStates) - val masterInvalid :: masterValid :: Nil = Enum(UInt(), nMasterStates) + val masterInvalid :: masterValid :: Nil = Enum(UInt(), nManagerStates) val acquireReadExclusiveClean :: acquireReadExclusiveDirty :: Nil = Enum(UInt(), nAcquireTypes) val probeInvalidate :: probeDowngrade :: probeCopy :: Nil = Enum(UInt(), nProbeTypes) @@ -279,8 +282,8 @@ class MEICoherence(dir: DirectoryRepresentation) extends CoherencePolicy(dir) { def isHit (cmd: UInt, m: ClientMetadata) = isValid(m) def isValid (m: ClientMetadata) = m.state != clientInvalid - def isHit (incoming: Acquire, m: MasterMetadata) = isValid(m) - def isValid (m: MasterMetadata) = m.state != masterInvalid + def isHit (incoming: Acquire, m: ManagerMetadata) = isValid(m) + def isValid (m: ManagerMetadata) = m.state != masterInvalid def needsTransactionOnSecondaryMiss(cmd: UInt, outstanding: Acquire): Bool = { (isRead(cmd) && outstanding.uncached) || @@ -295,7 +298,7 @@ class MEICoherence(dir: DirectoryRepresentation) extends CoherencePolicy(dir) { def needsWriteback (m: ClientMetadata): Bool = { needsTransactionOnCacheControl(M_INV, m) } - def needsWriteback(m: MasterMetadata) = isValid(m) + def needsWriteback(m: ManagerMetadata) = isValid(m) def clientMetadataOnHit(cmd: UInt, m: ClientMetadata) = ClientMetadata(Mux(isWrite(cmd), clientExclusiveDirty, m.state)) @@ -316,18 +319,18 @@ class MEICoherence(dir: DirectoryRepresentation) extends CoherencePolicy(dir) { probeDowngrade -> clientExclusiveClean, probeCopy -> m.state ))) - def masterMetadataOnFlush = MasterMetadata(masterInvalid) - def masterMetadataOnRelease(r: Release, m: MasterMetadata, src: UInt) = { - val next = MasterMetadata(masterValid, dir.pop(m.sharers,src)) + def managerMetadataOnFlush = ManagerMetadata(masterInvalid) + def managerMetadataOnRelease(r: Release, m: ManagerMetadata, src: UInt) = { + val next = ManagerMetadata(masterValid, dir.pop(m.sharers,src)) MuxBundle(m, Array( r.is(releaseVoluntaryInvalidateData) -> next, r.is(releaseInvalidateData) -> next, r.is(releaseInvalidateAck) -> next )) } - def masterMetadataOnGrant(g: Grant, m: MasterMetadata, dst: UInt) = { - val cached = MasterMetadata(masterValid, dir.push(m.sharers, dst)) - val uncached = MasterMetadata(masterValid, m.sharers) + def managerMetadataOnGrant(g: Grant, m: ManagerMetadata, dst: UInt) = { + val cached = ManagerMetadata(masterValid, dir.push(m.sharers, dst)) + val uncached = ManagerMetadata(masterValid, m.sharers) Mux(g.uncached, uncached, cached) } @@ -356,7 +359,7 @@ class MEICoherence(dir: DirectoryRepresentation) extends CoherencePolicy(dir) { Mux(needsWriteback(m), with_data, without_data) } - def messageHasData(msg: SourcedMessage) = msg match { + def messageHasData(msg: TileLinkChannel) = msg match { case acq: Acquire => Mux(acq.uncached, Acquire.hasData(acq.a_type), Bool(false)) case gnt: Grant => Mux(gnt.uncached, Grant.hasData(gnt.g_type), hasDataGrantTypeVec.contains(gnt.g_type)) case rel: Release => hasDataReleaseTypeVec.contains(rel.r_type) @@ -369,12 +372,12 @@ class MEICoherence(dir: DirectoryRepresentation) extends CoherencePolicy(dir) { def isCoherenceConflict(addr1: UInt, addr2: UInt): Bool = (addr1 === addr2) - def getGrantType(a: Acquire, m: MasterMetadata): UInt = { + def getGrantType(a: Acquire, m: ManagerMetadata): UInt = { Mux(a.uncached, getGrantTypeForUncached(a, m), grantReadExclusive) } - def getGrantTypeOnVoluntaryWriteback(m: MasterMetadata): UInt = grantVoluntaryAck + def getGrantTypeOnVoluntaryWriteback(m: ManagerMetadata): UInt = grantVoluntaryAck - def getProbeType(a: Acquire, m: MasterMetadata): UInt = { + def getProbeType(a: Acquire, m: ManagerMetadata): UInt = { Mux(a.uncached, MuxLookup(a.a_type, probeCopy, Array( Acquire.uncachedRead -> probeCopy, @@ -384,31 +387,29 @@ class MEICoherence(dir: DirectoryRepresentation) extends CoherencePolicy(dir) { } def getProbeTypeOnVoluntaryWriteback: UInt = probeInvalidate - def requiresOuterRead(acq: Acquire, m: MasterMetadata) = + def requiresOuterRead(acq: Acquire, m: ManagerMetadata) = Mux(acq.uncached, Acquire.requiresOuterRead(acq.a_type), Bool(true)) - def requiresOuterWrite(acq: Acquire, m: MasterMetadata) = + def requiresOuterWrite(acq: Acquire, m: ManagerMetadata) = Mux(acq.uncached, Acquire.requiresOuterWrite(acq.a_type), Bool(false)) def requiresAckForGrant(g: Grant) = g.uncached || g.g_type != grantVoluntaryAck def requiresAckForRelease(r: Release) = Bool(false) def requiresSelfProbe(a: Acquire) = a.uncached && a.a_type === Acquire.uncachedRead - def requiresProbes(a: Acquire, m: MasterMetadata) = !dir.none(m.sharers) - def requiresProbesOnVoluntaryWriteback(m: MasterMetadata) = !dir.none(m.sharers) - - def pendingVoluntaryReleaseIsSufficient(r_type: UInt, p_type: UInt): Bool = (r_type === releaseVoluntaryInvalidateData) + def requiresProbes(a: Acquire, m: ManagerMetadata) = !dir.none(m.sharers) + def requiresProbesOnVoluntaryWriteback(m: ManagerMetadata) = !dir.none(m.sharers) } class MSICoherence(dir: DirectoryRepresentation) extends CoherencePolicy(dir) { def nClientStates = 3 - def nMasterStates = 2 + def nManagerStates = 2 def nAcquireTypes = 2 def nProbeTypes = 3 def nReleaseTypes = 7 def nGrantTypes = 3 val clientInvalid :: clientShared :: clientExclusiveDirty :: Nil = Enum(UInt(), nClientStates) - //val masterInvalid :: masterShared :: masterExclusive :: Nil = Enum(UInt(), nMasterStates) - val masterInvalid :: masterValid :: Nil = Enum(UInt(), nMasterStates) + //val masterInvalid :: masterShared :: masterExclusive :: Nil = Enum(UInt(), nManagerStates) + val masterInvalid :: masterValid :: Nil = Enum(UInt(), nManagerStates) val acquireReadShared :: acquireReadExclusive :: Nil = Enum(UInt(), nAcquireTypes) val probeInvalidate :: probeDowngrade :: probeCopy :: Nil = Enum(UInt(), nProbeTypes) @@ -425,8 +426,8 @@ class MSICoherence(dir: DirectoryRepresentation) extends CoherencePolicy(dir) { def isValid (m: ClientMetadata): Bool = { m.state != clientInvalid } - def isHit (incoming: Acquire, m: MasterMetadata) = isValid(m) - def isValid (m: MasterMetadata) = m.state != masterInvalid + def isHit (incoming: Acquire, m: ManagerMetadata) = isValid(m) + def isValid (m: ManagerMetadata) = m.state != masterInvalid def needsTransactionOnSecondaryMiss(cmd: UInt, outstanding: Acquire): Bool = { (isRead(cmd) && outstanding.uncached) || @@ -441,7 +442,7 @@ class MSICoherence(dir: DirectoryRepresentation) extends CoherencePolicy(dir) { def needsWriteback (m: ClientMetadata): Bool = { needsTransactionOnCacheControl(M_INV, m) } - def needsWriteback(m: MasterMetadata) = isValid(m) + def needsWriteback(m: ManagerMetadata) = isValid(m) def clientMetadataOnHit(cmd: UInt, m: ClientMetadata) = ClientMetadata(Mux(isWrite(cmd), clientExclusiveDirty, m.state)) @@ -461,18 +462,18 @@ class MSICoherence(dir: DirectoryRepresentation) extends CoherencePolicy(dir) { probeDowngrade -> clientShared, probeCopy -> m.state ))) - def masterMetadataOnFlush = MasterMetadata(masterInvalid) - def masterMetadataOnRelease(r: Release, m: MasterMetadata, src: UInt) = { - val next = MasterMetadata(masterValid, dir.pop(m.sharers,src)) + def managerMetadataOnFlush = ManagerMetadata(masterInvalid) + def managerMetadataOnRelease(r: Release, m: ManagerMetadata, src: UInt) = { + val next = ManagerMetadata(masterValid, dir.pop(m.sharers,src)) MuxBundle(m, Array( r.is(releaseVoluntaryInvalidateData) -> next, r.is(releaseInvalidateData) -> next, r.is(releaseInvalidateAck) -> next )) } - def masterMetadataOnGrant(g: Grant, m: MasterMetadata, dst: UInt) = { - val cached = MasterMetadata(masterValid, dir.push(m.sharers, dst)) - val uncached = MasterMetadata(masterValid, m.sharers) + def managerMetadataOnGrant(g: Grant, m: ManagerMetadata, dst: UInt) = { + val cached = ManagerMetadata(masterValid, dir.push(m.sharers, dst)) + val uncached = ManagerMetadata(masterValid, m.sharers) Mux(g.uncached, uncached, cached) } @@ -501,7 +502,7 @@ class MSICoherence(dir: DirectoryRepresentation) extends CoherencePolicy(dir) { Mux(needsWriteback(m), with_data, without_data) } - def messageHasData(msg: SourcedMessage) = msg match { + def messageHasData(msg: TileLinkChannel) = msg match { case acq: Acquire => Mux(acq.uncached, Acquire.hasData(acq.a_type), Bool(false)) case gnt: Grant => Mux(gnt.uncached, Grant.hasData(gnt.g_type), hasDataGrantTypeVec.contains(gnt.g_type)) case rel: Release => hasDataReleaseTypeVec.contains(rel.r_type) @@ -514,15 +515,15 @@ class MSICoherence(dir: DirectoryRepresentation) extends CoherencePolicy(dir) { def isCoherenceConflict(addr1: UInt, addr2: UInt): Bool = (addr1 === addr2) - def getGrantType(a: Acquire, m: MasterMetadata): UInt = { + def getGrantType(a: Acquire, m: ManagerMetadata): UInt = { Mux(a.uncached, getGrantTypeForUncached(a, m), Mux(a.a_type === acquireReadShared, Mux(!dir.none(m.sharers), grantReadShared, grantReadExclusive), grantReadExclusive)) } - def getGrantTypeOnVoluntaryWriteback(m: MasterMetadata): UInt = grantVoluntaryAck + def getGrantTypeOnVoluntaryWriteback(m: ManagerMetadata): UInt = grantVoluntaryAck - def getProbeType(a: Acquire, m: MasterMetadata): UInt = { + def getProbeType(a: Acquire, m: ManagerMetadata): UInt = { Mux(a.uncached, MuxLookup(a.a_type, probeCopy, Array( Acquire.uncachedRead -> probeCopy, @@ -536,34 +537,32 @@ class MSICoherence(dir: DirectoryRepresentation) extends CoherencePolicy(dir) { } def getProbeTypeOnVoluntaryWriteback: UInt = probeInvalidate - def requiresOuterRead(acq: Acquire, m: MasterMetadata) = + def requiresOuterRead(acq: Acquire, m: ManagerMetadata) = Mux(acq.uncached, Acquire.requiresOuterRead(acq.a_type), Bool(true)) - def requiresOuterWrite(acq: Acquire, m: MasterMetadata) = + def requiresOuterWrite(acq: Acquire, m: ManagerMetadata) = Mux(acq.uncached, Acquire.requiresOuterWrite(acq.a_type), Bool(false)) def requiresAckForGrant(g: Grant) = g.uncached || g.g_type != grantVoluntaryAck def requiresAckForRelease(r: Release) = Bool(false) def requiresSelfProbe(a: Acquire) = a.uncached && a.a_type === Acquire.uncachedRead - def requiresProbes(a: Acquire, m: MasterMetadata) = !dir.none(m.sharers) && + def requiresProbes(a: Acquire, m: ManagerMetadata) = !dir.none(m.sharers) && Mux(dir.one(m.sharers), Bool(true), Mux(a.uncached, a.a_type != Acquire.uncachedRead, a.a_type != acquireReadShared)) - def requiresProbesOnVoluntaryWriteback(m: MasterMetadata) = !dir.none(m.sharers) - - def pendingVoluntaryReleaseIsSufficient(r_type: UInt, p_type: UInt): Bool = (r_type === releaseVoluntaryInvalidateData) + def requiresProbesOnVoluntaryWriteback(m: ManagerMetadata) = !dir.none(m.sharers) } class MESICoherence(dir: DirectoryRepresentation) extends CoherencePolicy(dir) { def nClientStates = 4 - def nMasterStates = 2 + def nManagerStates = 2 def nAcquireTypes = 2 def nProbeTypes = 3 def nReleaseTypes = 7 def nGrantTypes = 4 val clientInvalid :: clientShared :: clientExclusiveClean :: clientExclusiveDirty :: Nil = Enum(UInt(), nClientStates) - //val masterInvalid :: masterShared :: masterExclusive :: Nil = Enum(UInt(), nMasterStates) - val masterInvalid :: masterValid :: Nil = Enum(UInt(), nMasterStates) + //val masterInvalid :: masterShared :: masterExclusive :: Nil = Enum(UInt(), nManagerStates) + val masterInvalid :: masterValid :: Nil = Enum(UInt(), nManagerStates) val acquireReadShared :: acquireReadExclusive :: Nil = Enum(UInt(), nAcquireTypes) val probeInvalidate :: probeDowngrade :: probeCopy :: Nil = Enum(UInt(), nProbeTypes) @@ -580,8 +579,8 @@ class MESICoherence(dir: DirectoryRepresentation) extends CoherencePolicy(dir) { def isValid (m: ClientMetadata): Bool = { m.state != clientInvalid } - def isHit (incoming: Acquire, m: MasterMetadata) = isValid(m) - def isValid (m: MasterMetadata) = m.state != masterInvalid + def isHit (incoming: Acquire, m: ManagerMetadata) = isValid(m) + def isValid (m: ManagerMetadata) = m.state != masterInvalid def needsTransactionOnSecondaryMiss(cmd: UInt, outstanding: Acquire): Bool = { (isRead(cmd) && outstanding.uncached) || @@ -596,7 +595,7 @@ class MESICoherence(dir: DirectoryRepresentation) extends CoherencePolicy(dir) { def needsWriteback (m: ClientMetadata): Bool = { needsTransactionOnCacheControl(M_INV, m) } - def needsWriteback(m: MasterMetadata) = isValid(m) + def needsWriteback(m: ManagerMetadata) = isValid(m) def clientMetadataOnHit(cmd: UInt, m: ClientMetadata) = ClientMetadata(Mux(isWrite(cmd), clientExclusiveDirty, m.state)) @@ -621,18 +620,18 @@ class MESICoherence(dir: DirectoryRepresentation) extends CoherencePolicy(dir) { probeDowngrade -> clientShared, probeCopy -> m.state ))) - def masterMetadataOnFlush = MasterMetadata(masterInvalid) - def masterMetadataOnRelease(r: Release, m: MasterMetadata, src: UInt) = { - val next = MasterMetadata(masterValid, dir.pop(m.sharers,src)) + def managerMetadataOnFlush = ManagerMetadata(masterInvalid) + def managerMetadataOnRelease(r: Release, m: ManagerMetadata, src: UInt) = { + val next = ManagerMetadata(masterValid, dir.pop(m.sharers,src)) MuxBundle(m, Array( r.is(releaseVoluntaryInvalidateData) -> next, r.is(releaseInvalidateData) -> next, r.is(releaseInvalidateAck) -> next )) } - def masterMetadataOnGrant(g: Grant, m: MasterMetadata, dst: UInt) = { - val cached = MasterMetadata(masterValid, dir.push(m.sharers, dst)) - val uncached = MasterMetadata(masterValid, m.sharers) + def managerMetadataOnGrant(g: Grant, m: ManagerMetadata, dst: UInt) = { + val cached = ManagerMetadata(masterValid, dir.push(m.sharers, dst)) + val uncached = ManagerMetadata(masterValid, m.sharers) Mux(g.uncached, uncached, cached) } @@ -661,7 +660,7 @@ class MESICoherence(dir: DirectoryRepresentation) extends CoherencePolicy(dir) { Mux(needsWriteback(m), with_data, without_data) } - def messageHasData(msg: SourcedMessage) = msg match { + def messageHasData(msg: TileLinkChannel) = msg match { case acq: Acquire => Mux(acq.uncached, Acquire.hasData(acq.a_type), Bool(false)) case gnt: Grant => Mux(gnt.uncached, Grant.hasData(gnt.g_type), hasDataGrantTypeVec.contains(gnt.g_type)) case rel: Release => hasDataReleaseTypeVec.contains(rel.r_type) @@ -674,15 +673,15 @@ class MESICoherence(dir: DirectoryRepresentation) extends CoherencePolicy(dir) { def isCoherenceConflict(addr1: UInt, addr2: UInt): Bool = (addr1 === addr2) - def getGrantType(a: Acquire, m: MasterMetadata): UInt = { + def getGrantType(a: Acquire, m: ManagerMetadata): UInt = { Mux(a.uncached, getGrantTypeForUncached(a, m), Mux(a.a_type === acquireReadShared, Mux(!dir.none(m.sharers), grantReadShared, grantReadExclusive), grantReadExclusive)) } - def getGrantTypeOnVoluntaryWriteback(m: MasterMetadata): UInt = grantVoluntaryAck + def getGrantTypeOnVoluntaryWriteback(m: ManagerMetadata): UInt = grantVoluntaryAck - def getProbeType(a: Acquire, m: MasterMetadata): UInt = { + def getProbeType(a: Acquire, m: ManagerMetadata): UInt = { Mux(a.uncached, MuxLookup(a.a_type, probeCopy, Array( Acquire.uncachedRead -> probeCopy, @@ -696,34 +695,32 @@ class MESICoherence(dir: DirectoryRepresentation) extends CoherencePolicy(dir) { } def getProbeTypeOnVoluntaryWriteback: UInt = probeInvalidate - def requiresOuterRead(acq: Acquire, m: MasterMetadata) = + def requiresOuterRead(acq: Acquire, m: ManagerMetadata) = Mux(acq.uncached, Acquire.requiresOuterRead(acq.a_type), Bool(true)) - def requiresOuterWrite(acq: Acquire, m: MasterMetadata) = + def requiresOuterWrite(acq: Acquire, m: ManagerMetadata) = Mux(acq.uncached, Acquire.requiresOuterWrite(acq.a_type), Bool(false)) def requiresAckForGrant(g: Grant) = g.uncached || g.g_type != grantVoluntaryAck def requiresAckForRelease(r: Release) = Bool(false) def requiresSelfProbe(a: Acquire) = a.uncached && a.a_type === Acquire.uncachedRead - def requiresProbes(a: Acquire, m: MasterMetadata) = !dir.none(m.sharers) && + def requiresProbes(a: Acquire, m: ManagerMetadata) = !dir.none(m.sharers) && Mux(dir.one(m.sharers), Bool(true), Mux(a.uncached, a.a_type != Acquire.uncachedRead, a.a_type != acquireReadShared)) - def requiresProbesOnVoluntaryWriteback(m: MasterMetadata) = !dir.none(m.sharers) - - def pendingVoluntaryReleaseIsSufficient(r_type: UInt, p_type: UInt): Bool = (r_type === releaseVoluntaryInvalidateData) + def requiresProbesOnVoluntaryWriteback(m: ManagerMetadata) = !dir.none(m.sharers) } class MigratoryCoherence(dir: DirectoryRepresentation) extends CoherencePolicy(dir) { def nClientStates = 7 - def nMasterStates = 2 + def nManagerStates = 2 def nAcquireTypes = 3 def nProbeTypes = 4 def nReleaseTypes = 11 def nGrantTypes = 5 val clientInvalid :: clientShared :: clientExclusiveClean :: clientExclusiveDirty :: clientSharedByTwo :: clientMigratoryClean :: clientMigratoryDirty :: Nil = Enum(UInt(), nClientStates) - //val masterInvalid :: masterShared :: masterExclusive :: Nil = Enum(UInt(), nMasterStates) - val masterInvalid :: masterValid :: Nil = Enum(UInt(), nMasterStates) + //val masterInvalid :: masterShared :: masterExclusive :: Nil = Enum(UInt(), nManagerStates) + val masterInvalid :: masterValid :: Nil = Enum(UInt(), nManagerStates) val acquireReadShared :: acquireReadExclusive :: acquireInvalidateOthers :: Nil = Enum(UInt(), nAcquireTypes) val probeInvalidate :: probeDowngrade :: probeCopy :: probeInvalidateOthers :: Nil = Enum(UInt(), nProbeTypes) @@ -739,8 +736,8 @@ class MigratoryCoherence(dir: DirectoryRepresentation) extends CoherencePolicy(d def isValid (m: ClientMetadata): Bool = { m.state != clientInvalid } - def isHit (incoming: Acquire, m: MasterMetadata) = isValid(m) - def isValid (m: MasterMetadata) = m.state != masterInvalid + def isHit (incoming: Acquire, m: ManagerMetadata) = isValid(m) + def isValid (m: ManagerMetadata) = m.state != masterInvalid def needsTransactionOnSecondaryMiss(cmd: UInt, outstanding: Acquire): Bool = { (isRead(cmd) && outstanding.uncached) || @@ -755,7 +752,7 @@ class MigratoryCoherence(dir: DirectoryRepresentation) extends CoherencePolicy(d def needsWriteback (m: ClientMetadata): Bool = { needsTransactionOnCacheControl(M_INV, m) } - def needsWriteback(m: MasterMetadata) = isValid(m) + def needsWriteback(m: ManagerMetadata) = isValid(m) def clientMetadataOnHit(cmd: UInt, m: ClientMetadata) = ClientMetadata( Mux(isWrite(cmd), MuxLookup(m.state, clientExclusiveDirty, Array( @@ -792,9 +789,9 @@ class MigratoryCoherence(dir: DirectoryRepresentation) extends CoherencePolicy(d clientMigratoryClean -> clientSharedByTwo, clientMigratoryDirty -> clientInvalid)) ))) - def masterMetadataOnFlush = MasterMetadata(masterInvalid) - def masterMetadataOnRelease(r: Release, m: MasterMetadata, src: UInt) = { - val next = MasterMetadata(masterValid, dir.pop(m.sharers,src)) + def managerMetadataOnFlush = ManagerMetadata(masterInvalid) + def managerMetadataOnRelease(r: Release, m: ManagerMetadata, src: UInt) = { + val next = ManagerMetadata(masterValid, dir.pop(m.sharers,src)) MuxBundle(m, Array( r.is(releaseVoluntaryInvalidateData) -> next, r.is(releaseInvalidateData) -> next, @@ -803,9 +800,9 @@ class MigratoryCoherence(dir: DirectoryRepresentation) extends CoherencePolicy(d r.is(releaseInvalidateAckMigratory) -> next )) } - def masterMetadataOnGrant(g: Grant, m: MasterMetadata, dst: UInt) = { - val cached = MasterMetadata(masterValid, dir.push(m.sharers, dst)) - val uncached = MasterMetadata(masterValid, m.sharers) + def managerMetadataOnGrant(g: Grant, m: ManagerMetadata, dst: UInt) = { + val cached = ManagerMetadata(masterValid, dir.push(m.sharers, dst)) + val uncached = ManagerMetadata(masterValid, m.sharers) Mux(g.uncached, uncached, cached) } @@ -837,7 +834,7 @@ class MigratoryCoherence(dir: DirectoryRepresentation) extends CoherencePolicy(d Mux(needsWriteback(m), with_data, without_data) } - def messageHasData(msg: SourcedMessage) = msg match { + def messageHasData(msg: TileLinkChannel) = msg match { case acq: Acquire => Mux(acq.uncached, Acquire.hasData(acq.a_type), Bool(false)) case gnt: Grant => Mux(gnt.uncached, Grant.hasData(gnt.g_type), hasDataGrantTypeVec.contains(gnt.g_type)) case rel: Release => hasDataReleaseTypeVec.contains(rel.r_type) @@ -850,7 +847,7 @@ class MigratoryCoherence(dir: DirectoryRepresentation) extends CoherencePolicy(d def isCoherenceConflict(addr1: UInt, addr2: UInt): Bool = (addr1 === addr2) - def getGrantType(a: Acquire, m: MasterMetadata): UInt = { + def getGrantType(a: Acquire, m: ManagerMetadata): UInt = { Mux(a.uncached, getGrantTypeForUncached(a, m), MuxLookup(a.a_type, grantReadShared, Array( acquireReadShared -> Mux(!dir.none(m.sharers), grantReadShared, grantReadExclusive), @@ -858,9 +855,9 @@ class MigratoryCoherence(dir: DirectoryRepresentation) extends CoherencePolicy(d acquireInvalidateOthers -> grantReadExclusiveAck //TODO: add this to MESI for broadcast? ))) } - def getGrantTypeOnVoluntaryWriteback(m: MasterMetadata): UInt = grantVoluntaryAck + def getGrantTypeOnVoluntaryWriteback(m: ManagerMetadata): UInt = grantVoluntaryAck - def getProbeType(a: Acquire, m: MasterMetadata): UInt = { + def getProbeType(a: Acquire, m: ManagerMetadata): UInt = { Mux(a.uncached, MuxLookup(a.a_type, probeCopy, Array( Acquire.uncachedRead -> probeCopy, @@ -875,19 +872,17 @@ class MigratoryCoherence(dir: DirectoryRepresentation) extends CoherencePolicy(d } def getProbeTypeOnVoluntaryWriteback: UInt = probeInvalidate - def requiresOuterRead(acq: Acquire, m: MasterMetadata) = + def requiresOuterRead(acq: Acquire, m: ManagerMetadata) = Mux(acq.uncached, Acquire.requiresOuterRead(acq.a_type), acq.a_type != acquireInvalidateOthers) - def requiresOuterWrite(acq: Acquire, m: MasterMetadata) = + def requiresOuterWrite(acq: Acquire, m: ManagerMetadata) = Mux(acq.uncached, Acquire.requiresOuterWrite(acq.a_type), Bool(false)) def requiresAckForGrant(g: Grant) = g.uncached || g.g_type != grantVoluntaryAck def requiresAckForRelease(r: Release) = Bool(false) def requiresSelfProbe(a: Acquire) = a.uncached && a.a_type === Acquire.uncachedRead - def requiresProbes(a: Acquire, m: MasterMetadata) = !dir.none(m.sharers) && + def requiresProbes(a: Acquire, m: ManagerMetadata) = !dir.none(m.sharers) && Mux(dir.one(m.sharers), Bool(true), Mux(a.uncached, a.a_type != Acquire.uncachedRead, a.a_type != acquireReadShared)) - def requiresProbesOnVoluntaryWriteback(m: MasterMetadata) = !dir.none(m.sharers) - - def pendingVoluntaryReleaseIsSufficient(r_type: UInt, p_type: UInt): Bool = (r_type === releaseVoluntaryInvalidateData) + def requiresProbesOnVoluntaryWriteback(m: ManagerMetadata) = !dir.none(m.sharers) } diff --git a/uncore/src/main/scala/htif.scala b/uncore/src/main/scala/htif.scala index 378ca3b1..4db133d6 100644 --- a/uncore/src/main/scala/htif.scala +++ b/uncore/src/main/scala/htif.scala @@ -134,7 +134,7 @@ class HTIF(pcr_RESET: Int) extends Module with HTIFParameters { val mem_needs_ack = Reg(Bool()) when (io.mem.grant.valid) { mem_acked := Bool(true) - mem_gxid := io.mem.grant.bits.payload.master_xact_id + mem_gxid := io.mem.grant.bits.payload.manager_xact_id mem_gsrc := io.mem.grant.bits.header.src mem_needs_ack := co.requiresAckForGrant(io.mem.grant.bits.payload) } @@ -201,7 +201,7 @@ class HTIF(pcr_RESET: Int) extends Module with HTIFParameters { io.mem.acquire.bits.header.src := UInt(params(LNClients)) // By convention HTIF is the client with the largest id io.mem.acquire.bits.header.dst := UInt(0) // DNC; Overwritten outside module io.mem.finish.valid := (state === state_mem_finish) && mem_needs_ack - io.mem.finish.bits.payload.master_xact_id := mem_gxid + io.mem.finish.bits.payload.manager_xact_id := mem_gxid io.mem.finish.bits.header.dst := mem_gsrc io.mem.probe.ready := Bool(false) io.mem.release.valid := Bool(false) diff --git a/uncore/src/main/scala/network.scala b/uncore/src/main/scala/network.scala index a34e91c1..161a9a0c 100644 --- a/uncore/src/main/scala/network.scala +++ b/uncore/src/main/scala/network.scala @@ -3,7 +3,7 @@ package uncore import Chisel._ -case object LNMasters extends Field[Int] +case object LNManagers extends Field[Int] case object LNClients extends Field[Int] case object LNEndpoints extends Field[Int] diff --git a/uncore/src/main/scala/tilelink.scala b/uncore/src/main/scala/tilelink.scala index 4e5ac961..af10d455 100644 --- a/uncore/src/main/scala/tilelink.scala +++ b/uncore/src/main/scala/tilelink.scala @@ -4,10 +4,13 @@ package uncore import Chisel._ import scala.math.max -case object TLId extends Field[String] +// Parameters exposed to the top-level design, set based on +// external requirements or design space exploration +// +case object TLId extends Field[String] // Unique name per network case object TLCoherence extends Field[CoherencePolicy] case object TLAddrBits extends Field[Int] -case object TLMasterXactIdBits extends Field[Int] +case object TLManagerXactIdBits extends Field[Int] case object TLClientXactIdBits extends Field[Int] case object TLDataBits extends Field[Int] case object TLDataBeats extends Field[Int] @@ -15,7 +18,7 @@ case object TLDataBeats extends Field[Int] abstract trait TileLinkParameters extends UsesParameters { val tlAddrBits = params(TLAddrBits) val tlClientXactIdBits = params(TLClientXactIdBits) - val tlMasterXactIdBits = params(TLMasterXactIdBits) + val tlManagerXactIdBits = params(TLManagerXactIdBits) val tlDataBits = params(TLDataBits) val tlDataBeats = params(TLDataBeats) val tlWriteMaskBits = if(tlDataBits/8 < 1) 1 else tlDataBits @@ -25,13 +28,23 @@ abstract trait TileLinkParameters extends UsesParameters { val tlSubblockUnionBits = max(tlWriteMaskBits, (tlSubblockAddrBits + tlUncachedOperandSizeBits + - tlAtomicOpcodeBits)) + tlAtomicOpcodeBits)) + 1 val co = params(TLCoherence) } abstract class TLBundle extends Bundle with TileLinkParameters abstract class TLModule extends Module with TileLinkParameters +// Directionality of message channel +// Used to hook up logical network ports to physical network ports +trait TileLinkChannel extends TLBundle +trait ClientToManagerChannel extends TileLinkChannel +trait ManagerToClientChannel extends TileLinkChannel +trait ClientToClientChannel extends TileLinkChannel // Unused for now + +// Common signals that are used in multiple channels. +// These traits are useful for type parameterization. +// trait HasPhysicalAddress extends TLBundle { val addr = UInt(width = tlAddrBits) } @@ -40,19 +53,17 @@ trait HasClientTransactionId extends TLBundle { val client_xact_id = Bits(width = tlClientXactIdBits) } -trait HasMasterTransactionId extends TLBundle { - val master_xact_id = Bits(width = tlMasterXactIdBits) +trait HasManagerTransactionId extends TLBundle { + val manager_xact_id = Bits(width = tlManagerXactIdBits) } trait HasTileLinkData extends TLBundle { val data = UInt(width = tlDataBits) } -trait SourcedMessage extends TLBundle -trait ClientSourcedMessage extends SourcedMessage -trait MasterSourcedMessage extends SourcedMessage +// Actual TileLink channel bundle definitions -class Acquire extends ClientSourcedMessage +class Acquire extends ClientToManagerChannel with HasPhysicalAddress with HasClientTransactionId with HasTileLinkData { @@ -61,16 +72,17 @@ class Acquire extends ClientSourcedMessage val subblock = Bits(width = tlSubblockUnionBits) val sbAddrOff = tlSubblockAddrBits + tlUncachedOperandSizeBits val opSzOff = tlUncachedOperandSizeBits + sbAddrOff - def operand_sz(dummy: Int = 0) = subblock(tlUncachedOperandSizeBits-1, 0) - def subblock_addr(dummy: Int = 0) = subblock(sbAddrOff-1, tlUncachedOperandSizeBits) - def atomic_op(dummy: Int = 0) = subblock(opSzOff-1, sbAddrOff) - def write_mask(dummy: Int = 0) = subblock(tlWriteMaskBits-1, 0) + def allocate(dummy: Int = 0) = subblock(0) + def operand_sz(dummy: Int = 0) = subblock(tlUncachedOperandSizeBits, 1) + def subblock_addr(dummy: Int = 0) = subblock(sbAddrOff, tlUncachedOperandSizeBits+1) + def atomic_op(dummy: Int = 0) = subblock(opSzOff, sbAddrOff+1) + def write_mask(dummy: Int = 0) = subblock(tlWriteMaskBits, 1) def is(t: UInt) = a_type === t } object Acquire { val nUncachedAcquireTypes = 3 - //val uncachedRead :: uncachedWrite :: uncachedAtomic :: Nil = Enum(UInt(), nUncachedAcquireTypes) + //TODO: val uncachedRead :: uncachedWrite :: uncachedAtomic :: Nil = Enum(UInt(), nUncachedAcquireTypes) def uncachedRead = UInt(0) def uncachedWrite = UInt(1) def uncachedAtomic = UInt(2) @@ -102,29 +114,29 @@ object Acquire { } object UncachedRead { - def apply(addr: UInt, client_xact_id: UInt, subblock_addr: UInt, operand_sz: UInt): Acquire = { + def apply(addr: UInt, client_xact_id: UInt, subblock_addr: UInt, operand_sz: UInt, alloc: Bool): Acquire = { val acq = Acquire(Acquire.uncachedRead, addr, client_xact_id) acq.uncached := Bool(true) - acq.subblock := Cat(subblock_addr, operand_sz) + acq.subblock := Cat(subblock_addr, operand_sz, alloc) acq } def apply(addr: UInt, client_xact_id: UInt): Acquire = { - apply(addr, client_xact_id, UInt(0), MT_CB) + apply(addr, client_xact_id, UInt(0), MT_CB, Bool(true)) } def apply(addr: UInt): Acquire = { - apply(addr, UInt(0), UInt(0), MT_CB) + apply(addr, UInt(0)) } } object UncachedWrite { - def apply(addr: UInt, client_xact_id: UInt, write_mask: Bits, data: UInt): Acquire = { + def apply(addr: UInt, client_xact_id: UInt, write_mask: Bits, alloc: Bool, data: UInt): Acquire = { val acq = Acquire(Acquire.uncachedWrite, addr, client_xact_id, data) acq.uncached := Bool(true) - acq.subblock := write_mask + acq.subblock := Cat(write_mask, alloc) acq } def apply(addr: UInt, client_xact_id: UInt, data: UInt): Acquire = { - apply(addr, client_xact_id, SInt(-1), data) + apply(addr, client_xact_id, SInt(-1), Bool(true), data) } def apply(addr: UInt, data: UInt): Acquire = { apply(addr, UInt(0), data) @@ -136,11 +148,17 @@ object UncachedAtomic { subblock_addr: UInt, operand_sz: UInt, data: UInt): Acquire = { val acq = Acquire(Acquire.uncachedAtomic, addr, client_xact_id, data) acq.uncached := Bool(true) - acq.subblock := Cat(atomic_opcode, subblock_addr, operand_sz) + acq.subblock := Cat(atomic_opcode, subblock_addr, operand_sz, Bool(true)) acq } } +class Probe extends ManagerToClientChannel + with HasPhysicalAddress { + val p_type = UInt(width = co.probeTypeWidth) + def is(t: UInt) = p_type === t +} + object Probe { def apply(p_type: UInt, addr: UInt) = { val prb = new Probe @@ -150,10 +168,12 @@ object Probe { } } -class Probe extends MasterSourcedMessage - with HasPhysicalAddress { - val p_type = UInt(width = co.probeTypeWidth) - def is(t: UInt) = p_type === t +class Release extends ClientToManagerChannel + with HasPhysicalAddress + with HasClientTransactionId + with HasTileLinkData { + val r_type = UInt(width = co.releaseTypeWidth) + def is(t: UInt) = r_type === t } object Release { @@ -173,18 +193,10 @@ object Release { } } -class Release extends ClientSourcedMessage - with HasPhysicalAddress - with HasClientTransactionId - with HasTileLinkData { - val r_type = UInt(width = co.releaseTypeWidth) - def is(t: UInt) = r_type === t -} - -class Grant extends MasterSourcedMessage +class Grant extends ManagerToClientChannel with HasTileLinkData with HasClientTransactionId - with HasMasterTransactionId { + with HasManagerTransactionId { val uncached = Bool() val g_type = UInt(width = max(log2Up(Grant.nUncachedGrantTypes), co.grantTypeWidth)) def is(t: UInt) = g_type === t @@ -192,29 +204,30 @@ class Grant extends MasterSourcedMessage object Grant { val nUncachedGrantTypes = 3 - //val uncachedRead :: uncachedWrite :: uncachedAtomic :: Nil = Enum(UInt(), nUncachedGrantTypes) + //TODO val uncachedRead :: uncachedWrite :: uncachedAtomic :: Nil = Enum(UInt(), nUncachedGrantTypes) def uncachedRead = UInt(0) def uncachedWrite = UInt(1) def uncachedAtomic = UInt(2) def hasData(g_type: UInt) = Vec(uncachedRead, uncachedAtomic).contains(g_type) - def apply(uncached: Bool, g_type: UInt, client_xact_id: UInt, master_xact_id: UInt, data: UInt): Grant = { + def apply(uncached: Bool, g_type: UInt, client_xact_id: UInt, manager_xact_id: UInt, data: UInt): Grant = { val gnt = new Grant gnt.uncached := uncached gnt.g_type := g_type gnt.client_xact_id := client_xact_id - gnt.master_xact_id := master_xact_id + gnt.manager_xact_id := manager_xact_id gnt.data := data gnt } - def apply(uncached: Bool, g_type: UInt, client_xact_id: UInt, master_xact_id: UInt): Grant = { - apply(uncached, g_type, client_xact_id, master_xact_id, UInt(0)) + def apply(uncached: Bool, g_type: UInt, client_xact_id: UInt, manager_xact_id: UInt): Grant = { + apply(uncached, g_type, client_xact_id, manager_xact_id, UInt(0)) } } -class Finish extends ClientSourcedMessage with HasMasterTransactionId +class Finish extends ClientToManagerChannel with HasManagerTransactionId +// Complete IO definitions for two types of TileLink clients class UncachedTileLinkIO extends Bundle { val acquire = new DecoupledIO(new LogicalNetworkIO(new Acquire)) val grant = new DecoupledIO(new LogicalNetworkIO(new Grant)).flip @@ -226,6 +239,8 @@ class TileLinkIO extends UncachedTileLinkIO { val release = new DecoupledIO(new LogicalNetworkIO(new Release)) } +// Converts UncachedTileLinkIO to regular TileLinkIO by pinning +// probe.ready and release.valid low class TileLinkIOWrapper extends TLModule { val io = new Bundle { val in = new UncachedTileLinkIO().flip @@ -245,13 +260,16 @@ object TileLinkIOWrapper { } } +// Utility functions for constructing TileLinkIO arbiters abstract class TileLinkArbiterLike(val arbN: Int) extends TLModule { - type MasterSourcedWithId = MasterSourcedMessage with HasClientTransactionId - type ClientSourcedWithId = ClientSourcedMessage with HasClientTransactionId + type ManagerSourcedWithId = ManagerToClientChannel with HasClientTransactionId + type ClientSourcedWithId = ClientToManagerChannel with HasClientTransactionId + // These are filled in depending on whether the arbiter mucks with the + // client ids and then needs to revert them on the way back def clientSourcedClientXactId(in: ClientSourcedWithId, id: Int): Bits - def masterSourcedClientXactId(in: MasterSourcedWithId): Bits - def arbIdx(in: MasterSourcedWithId): UInt + def managerSourcedClientXactId(in: ManagerSourcedWithId): Bits + def arbIdx(in: ManagerSourcedWithId): UInt def hookupClientSource[M <: ClientSourcedWithId] (ins: Seq[DecoupledIO[LogicalNetworkIO[M]]], @@ -267,7 +285,7 @@ abstract class TileLinkArbiterLike(val arbN: Int) extends TLModule { }} } - def hookupMasterSource[M <: MasterSourcedWithId] + def hookupManagerSource[M <: ManagerSourcedWithId] (ins: Seq[DecoupledIO[LogicalNetworkIO[M]]], out: DecoupledIO[LogicalNetworkIO[M]]) { out.ready := Bool(false) @@ -278,7 +296,7 @@ abstract class TileLinkArbiterLike(val arbN: Int) extends TLModule { out.ready := ins(i).ready } ins(i).bits := out.bits - ins(i).bits.payload.client_xact_id := masterSourcedClientXactId(out.bits.payload) + ins(i).bits.payload.client_xact_id := managerSourcedClientXactId(out.bits.payload) } } } @@ -291,7 +309,7 @@ abstract class UncachedTileLinkIOArbiter(n: Int) } hookupClientSource(io.in.map(_.acquire), io.out.acquire) - hookupMasterSource(io.in.map(_.grant), io.out.grant) + hookupManagerSource(io.in.map(_.grant), io.out.grant) val finish_arb = Module(new RRArbiter(new LogicalNetworkIO(new Finish), n)) io.out.finish <> finish_arb.io.out @@ -306,7 +324,7 @@ abstract class TileLinkIOArbiter(n: Int) extends TileLinkArbiterLike(n) { hookupClientSource(io.in.map(_.acquire), io.out.acquire) hookupClientSource(io.in.map(_.release), io.out.release) - hookupMasterSource(io.in.map(_.grant), io.out.grant) + hookupManagerSource(io.in.map(_.grant), io.out.grant) io.in.map{ _.probe.valid := io.out.probe.valid } io.in.map{ _.probe.bits := io.out.probe.bits } @@ -317,35 +335,39 @@ abstract class TileLinkIOArbiter(n: Int) extends TileLinkArbiterLike(n) { finish_arb.io.in zip io.in map { case (arb, req) => arb <> req.finish } } +// Appends the port index of the arbiter to the client_xact_id abstract trait AppendsArbiterId { val arbN: Int - def clientSourcedClientXactId(in: ClientSourcedMessage with HasClientTransactionId, id: Int) = + def clientSourcedClientXactId(in: ClientToManagerChannel with HasClientTransactionId, id: Int) = Cat(in.client_xact_id, UInt(id, log2Up(arbN))) - def masterSourcedClientXactId(in: MasterSourcedMessage with HasClientTransactionId) = + def managerSourcedClientXactId(in: ManagerToClientChannel with HasClientTransactionId) = in.client_xact_id >> UInt(log2Up(arbN)) - def arbIdx(in: MasterSourcedMessage with HasClientTransactionId) = + def arbIdx(in: ManagerToClientChannel with HasClientTransactionId) = in.client_xact_id(log2Up(arbN)-1,0).toUInt } +// Uses the client_xact_id as is (assumes it has been set to port index) abstract trait PassesId { - def clientSourcedClientXactId(in: ClientSourcedMessage with HasClientTransactionId, id: Int) = + def clientSourcedClientXactId(in: ClientToManagerChannel with HasClientTransactionId, id: Int) = in.client_xact_id - def masterSourcedClientXactId(in: MasterSourcedMessage with HasClientTransactionId) = + def managerSourcedClientXactId(in: ManagerToClientChannel with HasClientTransactionId) = in.client_xact_id - def arbIdx(in: MasterSourcedMessage with HasClientTransactionId) = + def arbIdx(in: ManagerToClientChannel with HasClientTransactionId) = in.client_xact_id } +// Overwrites some default client_xact_id with the port idx abstract trait UsesNewId { val arbN: Int - def clientSourcedClientXactId(in: ClientSourcedMessage with HasClientTransactionId, id: Int) = + def clientSourcedClientXactId(in: ClientToManagerChannel with HasClientTransactionId, id: Int) = UInt(id, log2Up(arbN)) - def masterSourcedClientXactId(in: MasterSourcedMessage with HasClientTransactionId) = + def managerSourcedClientXactId(in: ManagerToClientChannel with HasClientTransactionId) = UInt(0) - def arbIdx(in: MasterSourcedMessage with HasClientTransactionId) = + def arbIdx(in: ManagerToClientChannel with HasClientTransactionId) = in.client_xact_id } +// Mix-in id generation traits to make concrete arbiter classes class UncachedTileLinkIOArbiterThatAppendsArbiterId(val n: Int) extends UncachedTileLinkIOArbiter(n) with AppendsArbiterId class UncachedTileLinkIOArbiterThatPassesId(val n: Int) extends UncachedTileLinkIOArbiter(n) with PassesId class UncachedTileLinkIOArbiterThatUsesNewId(val n: Int) extends UncachedTileLinkIOArbiter(n) with UsesNewId diff --git a/uncore/src/main/scala/uncore.scala b/uncore/src/main/scala/uncore.scala index e8e82d22..d2531a9e 100644 --- a/uncore/src/main/scala/uncore.scala +++ b/uncore/src/main/scala/uncore.scala @@ -194,7 +194,7 @@ class VoluntaryReleaseTracker(trackerId: Int, bankId: Int, innerId: String, oute io.inner.grant.bits.header.src := UInt(bankId) io.inner.grant.bits.header.dst := xact_src io.inner.grant.bits.payload := Grant(Bool(false), - co.getGrantTypeOnVoluntaryWriteback(co.masterMetadataOnFlush), + co.getGrantTypeOnVoluntaryWriteback(co.managerMetadataOnFlush), xact_client_xact_id, UInt(trackerId)) @@ -261,7 +261,7 @@ class AcquireTracker(trackerId: Int, bankId: Int, innerId: String, outerId: Stri val curr_p_id = PriorityEncoder(probe_flags) val pending_outer_write = co.messageHasData(xact) - val pending_outer_read = co.requiresOuterRead(xact, co.masterMetadataOnFlush) + val pending_outer_read = co.requiresOuterRead(xact, co.managerMetadataOnFlush) val probe_initial_flags = Bits(width = nClients) probe_initial_flags := Bits(0) @@ -290,13 +290,13 @@ class AcquireTracker(trackerId: Int, bankId: Int, innerId: String, outerId: Stri io.inner.probe.valid := Bool(false) io.inner.probe.bits.header.src := UInt(bankId) io.inner.probe.bits.header.dst := curr_p_id - io.inner.probe.bits.payload := Probe(co.getProbeType(xact, co.masterMetadataOnFlush), xact_addr) + io.inner.probe.bits.payload := Probe(co.getProbeType(xact, co.managerMetadataOnFlush), xact_addr) io.inner.grant.valid := Bool(false) io.inner.grant.bits.header.src := UInt(bankId) io.inner.grant.bits.header.dst := xact_src io.inner.grant.bits.payload := Grant(xact_uncached, - co.getGrantType(xact, co.masterMetadataOnFlush), + co.getGrantType(xact, co.managerMetadataOnFlush), xact_client_xact_id, UInt(trackerId), UInt(0)) // Data bypassed in parent @@ -316,7 +316,7 @@ class AcquireTracker(trackerId: Int, bankId: Int, innerId: String, outerId: Stri is(s_idle) { io.inner.acquire.ready := Bool(true) val needs_outer_write = co.messageHasData(c_acq.payload) - val needs_outer_read = co.requiresOuterRead(c_acq.payload, co.masterMetadataOnFlush) + val needs_outer_read = co.requiresOuterRead(c_acq.payload, co.managerMetadataOnFlush) when( io.inner.acquire.valid ) { xact_uncached := c_acq.payload.uncached xact_a_type := c_acq.payload.a_type @@ -389,7 +389,7 @@ class AcquireTracker(trackerId: Int, bankId: Int, innerId: String, outerId: Stri when(io.outer.grant.valid && m_gnt.payload.client_xact_id === UInt(trackerId)) { io.inner.grant.valid := Bool(true) } - when(io.inner.finish.valid && c_ack.payload.master_xact_id === UInt(trackerId)) { + when(io.inner.finish.valid && c_ack.payload.manager_xact_id === UInt(trackerId)) { state := s_idle } }