riscv/rocket-chip
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Get rid of MemIO in Top and replace with AXI throughout

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This commit is contained in:
Howard Mao
2015-10-14 11:33:18 -07:00
parent 032bdd0601
commit 9dabcab9c2
10 changed files with 651 additions and 299 deletions
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4
fsim/Makefrag
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@ -52,13 +52,13 @@ VCS_OPTS = -notice -line +lint=all,noVCDE,noONGS,noUI -error=PCWM-L -timescale=1
# Build the simulator
#--------------------------------------------------------------------
simv = $(sim_dir)/simv-$(CONFIG)
simv = $(sim_dir)/simv-$(MODEL)-$(CONFIG)
$(simv) : $(sim_vsrcs) $(sim_csrcs) $(sim_dir)/libdramsim.a
cd $(sim_dir) && \
$(VCS) $(VCS_OPTS) -o $(simv) \
-debug_pp \
simv_debug = $(sim_dir)/simv-$(CONFIG)-debug
simv_debug = $(sim_dir)/simv-$(MODEL)-$(CONFIG)-debug
$(simv_debug) : $(sim_vsrcs) $(sim_csrcs) $(sim_dir)/libdramsim.a
cd $(sim_dir) && \
$(VCS) $(VCS_OPTS) -o $(simv_debug) \