From 9ae4838708c3f568f55cc1144386ad075ea81387 Mon Sep 17 00:00:00 2001
From: Megan Wachs <megan@sifive.com>
Date: Fri, 7 Apr 2017 11:48:54 -0700
Subject: [PATCH] jtag: Get rid of chisel deprecation warnings

---
 src/main/scala/jtag/JtagStateMachine.scala | 2 +-
 src/main/scala/jtag/Utils.scala            | 4 ++--
 2 files changed, 3 insertions(+), 3 deletions(-)

diff --git a/src/main/scala/jtag/JtagStateMachine.scala b/src/main/scala/jtag/JtagStateMachine.scala
index da1606f3..80f92437 100644
--- a/src/main/scala/jtag/JtagStateMachine.scala
+++ b/src/main/scala/jtag/JtagStateMachine.scala
@@ -36,7 +36,7 @@ object JtagState {
       Exit2IR,
       UpdateIR
     )
-    val width = log2Up(all.size)
+    val width = log2Ceil(all.size)
     def chiselType() = UInt(width.W)
   }
 
diff --git a/src/main/scala/jtag/Utils.scala b/src/main/scala/jtag/Utils.scala
index f35a412a..3b8644c5 100644
--- a/src/main/scala/jtag/Utils.scala
+++ b/src/main/scala/jtag/Utils.scala
@@ -48,14 +48,14 @@ class ClockedCounter(modClock: Clock, counts: BigInt, init: Option[BigInt])
     extends Module(override_clock=Some(modClock)) {
   require(counts > 0, "really?")
 
-  val width = log2Up(counts)
+  val width = log2Ceil(counts)
   class CountIO extends Bundle {
     val count = Output(UInt(width.W))
   }
   val io = IO(new CountIO)
 
   val count = init match {
-    case Some(init) => Reg(UInt(width.W), init=init.U)
+    case Some(init) => RegInit(init.U(width.W))
     case None => Reg(UInt(width.W))
   }