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replace emulator with verilator for chisel3

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This commit is contained in:
Donggyu Kim
2016-06-08 01:39:40 -07:00
parent 08e53a00f0
commit 99b257316e
6 changed files with 419 additions and 85 deletions
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52
emulator/Makefile
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@ -13,46 +13,16 @@ include $(base_dir)/Makefrag
CXXSRCS := emulator mm mm_dramsim2
CXXFLAGS := $(CXXFLAGS) -std=c++11 -I$(RISCV)/include -I$(base_dir)/csrc -I$(base_dir)/dramsim2
LDFLAGS := $(LDFLAGS) -L$(RISCV)/lib -Wl,-rpath,$(RISCV)/lib -L. -ldramsim -lfesvr -lpthread
OBJS := $(addsuffix .o,$(CXXSRCS) $(MODEL).$(CONFIG))
DEBUG_OBJS := $(addsuffix .debug.o,$(CXXSRCS) $(MODEL).$(CONFIG))
model_header = $(generated_dir)/$(MODEL).$(CONFIG).h
model_header_debug = $(generated_dir_debug)/$(MODEL).$(CONFIG).h
$(MODEL).$(CONFIG).o: %.o: $(generated_dir)/%.h
$(MAKE) -j $(patsubst %.cpp,%.o,$(shell ls $(generated_dir)/$(MODEL).$(CONFIG)-*.cpp))
$(LD) -r $(patsubst %.cpp,%.o,$(shell ls $(generated_dir)/$(MODEL).$(CONFIG)-*.cpp)) -o $@
$(MODEL).$(CONFIG).debug.o: %.debug.o: $(generated_dir_debug)/%.h
$(MAKE) -j $(patsubst %.cpp,%.o,$(shell ls $(generated_dir_debug)/$(MODEL).$(CONFIG)-*.cpp))
$(LD) -r $(patsubst %.cpp,%.o,$(shell ls $(generated_dir_debug)/$(MODEL).$(CONFIG)-*.cpp)) -o $@
$(generated_dir)/%.o: $(generated_dir)/%.cpp $(generated_dir)/%.h
$(CXX) $(CXXFLAGS) -I$(generated_dir) -c -o $@ $<
$(generated_dir_debug)/%.o: $(generated_dir_debug)/%.cpp $(generated_dir_debug)/%.h
$(CXX) $(CXXFLAGS) -I$(generated_dir_debug) -c -o $@ $<
$(addsuffix .o,$(CXXSRCS)): %.o: $(base_dir)/csrc/%.cc $(base_dir)/csrc/*.h $(model_header) $(consts_header)
$(CXX) $(CXXFLAGS) -include $(scr_header) -include $(model_header) -include $(consts_header) -I$(generated_dir) -c -o $@ $<
$(addsuffix .debug.o,$(CXXSRCS)): %.debug.o: $(base_dir)/csrc/%.cc $(base_dir)/csrc/*.h $(model_header_debug) $(consts_header_debug)
$(CXX) $(CXXFLAGS) -include $(scr_header_debug) -include $(model_header_debug) -include $(consts_header_debug) -I$(generated_dir_debug) -c -o $@ $<
$(generated_dir)/$(MODEL).$(CONFIG).d $(model_header) $(params_file): $(chisel_srcs)
cd $(base_dir) && $(SBT) "project $(PROJECT)" "run $(CHISEL_ARGS) --noIoDebug"
$(model_header_debug) $(params_file_debug): $(chisel_srcs)
cd $(base_dir) && $(SBT) "project $(PROJECT)" "run $(CHISEL_ARGS)-debug --debug --vcd --ioDebug"
LDFLAGS := $(LDFLAGS) -L$(RISCV)/lib -Wl,-rpath,$(RISCV)/lib -L$(abspath $(sim_dir)) -ldramsim -lfesvr -lpthread
emu = emulator-$(MODEL)-$(CONFIG)
$(emu): $(model_header) $(OBJS) libdramsim.a
$(CXX) $(CXXFLAGS) -o $@ $(OBJS) $(LDFLAGS)
emu_debug = emulator-$(MODEL)-$(CONFIG)-debug
$(emu_debug): $(generated_dir)/$(MODEL).$(CONFIG).d $(model_header_debug) $(DEBUG_OBJS) libdramsim.a
$(CXX) $(CXXFLAGS) -o $@ $(DEBUG_OBJS) $(LDFLAGS)
ifeq ($(CHISEL_VERSION),2)
include $(sim_dir)/Makefrag-emulator
else
include $(sim_dir)/Makefrag-verilator
endif
all: $(emu)
debug: $(emu_debug)
@ -73,16 +43,16 @@ ifneq ($(MAKECMDGOALS),clean)
-include $(generated_dir)/$(MODEL).$(CONFIG).d
endif
$(output_dir)/%.run: $(output_dir)/% emulator-$(MODEL)-$(CONFIG)
$(output_dir)/%.run: $(output_dir)/% $(emu)
./$(emu) +dramsim +max-cycles=$(timeout_cycles) $< 2> /dev/null 2> $@ && [ $$PIPESTATUS -eq 0 ]
$(output_dir)/%.out: $(output_dir)/% emulator-$(MODEL)-$(CONFIG)
$(output_dir)/%.out: $(output_dir)/% $(emu)
./$(emu) +dramsim +max-cycles=$(timeout_cycles) +verbose $< $(disasm) $@ && [ $$PIPESTATUS -eq 0 ]
$(output_dir)/%.vcd: $(output_dir)/% emulator-$(MODEL)-$(CONFIG)-debug
$(output_dir)/%.vcd: $(output_dir)/% $(emu_debug)
./$(emu_debug) +dramsim +max-cycles=$(timeout_cycles) +verbose -v$@ $< $(disasm) $(patsubst %.vcd,%.out,$@) && [ $$PIPESTATUS -eq 0 ]
$(output_dir)/%.vpd: $(output_dir)/% emulator-$(MODEL)-$(CONFIG)-debug
$(output_dir)/%.vpd: $(output_dir)/% $(emu_debug)
rm -rf $@.vcd && mkfifo $@.vcd
vcd2vpd $@.vcd $@ > /dev/null &
./$(emu_debug) +dramsim +max-cycles=$(timeout_cycles) +verbose -v$@.vcd $< $(disasm) $(patsubst %.vpd,%.out,$@) && [ $$PIPESTATUS -eq 0 ]