diff --git a/rocket/src/main/scala/instructions.scala b/rocket/src/main/scala/instructions.scala
index bf985739..093f14e7 100644
--- a/rocket/src/main/scala/instructions.scala
+++ b/rocket/src/main/scala/instructions.scala
@@ -249,14 +249,14 @@ object Instructions
   val VSETVL     = Bits("b?????_?????_000000000000_101_1110011",32);
   val VF         = Bits("b00000_?????_????????????_111_1110011",32);
   // vector supervisor instructions
-  val VENQCMD    = Bits("b00000_?????_?????_1000000000_1111011",32)
-  val VENQIMM1   = Bits("b00000_?????_?????_1000000001_1111011",32)
-  val VENQIMM2   = Bits("b00000_?????_?????_1000000010_1111011",32)
-  val VENQCNT    = Bits("b00000_?????_?????_1000000011_1111011",32)
+  val VENQCMD    = Bits("b00000_?????_?????_1100000011_1111011",32)
+  val VENQIMM1   = Bits("b00000_?????_?????_1100000100_1111011",32)
+  val VENQIMM2   = Bits("b00000_?????_?????_1100000101_1111011",32)
+  val VENQCNT    = Bits("b00000_?????_?????_1100000110_1111011",32)
   val VXCPTEVAC  = Bits("b00000_?????_00000_1100000000_1111011",32)
-  val VXCPTKILL  = Bits("b00000_00000_00000_1100000001_1111011",32)
-  val VXCPTWAIT  = Bits("b00000_00000_00000_1100000010_1111011",32)
-  val VXCPTHOLD  = Bits("b00000_00000_00000_1100000011_1111011",32)
+  val VXCPTKILL  = Bits("b00000_00000_00000_1000000010_1111011",32)
+  val VXCPTWAIT  = Bits("b00000_00000_00000_1100000001_1111011",32)
+  val VXCPTHOLD  = Bits("b00000_00000_00000_1100000010_1111011",32)
 
   val NOP = ADDI & Bits("b00000000000000000000001111111111", 32);
 }