Add RISC-V instruction disassembler
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@ -1,6 +1,7 @@
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package rocket
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import Chisel._
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import scala.math._
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object Util
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{
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@ -24,6 +25,77 @@ object AVec
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tabulate(n1)(i1 => tabulate(n2)(f(i1, _)))
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}
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object Str
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{
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def apply(s: String): Bits = {
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var i = BigInt(0)
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require(s.forall(validChar _))
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for (c <- s)
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i = (i << 8) | c
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Lit(i, s.length*8){Bits()}
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}
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def apply(x: Char): Bits = {
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require(validChar(x))
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Lit(x, 8){Bits()}
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}
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def apply(x: UFix): Bits = apply(x, 10)
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def apply(x: UFix, radix: Int): Bits = {
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val rad = UFix(radix)
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val digs = digits(radix)
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val w = x.getWidth
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require(w > 0)
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var q = x
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var s = digs(q % rad)
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for (i <- 1 until ceil(log(2)/log(radix)*w).toInt) {
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q = q / rad
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s = Cat(Mux(Bool(radix == 10) && q === UFix(0), Str(' '), digs(q % rad)), s)
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}
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s
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}
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def apply(x: Fix): Bits = apply(x, 10)
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def apply(x: Fix, radix: Int): Bits = {
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val neg = x < Fix(0)
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val abs = Mux(neg, -x, x).toUFix
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if (radix != 10) {
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Cat(Mux(neg, Str('-'), Str(' ')), Str(abs, radix))
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} else {
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val rad = UFix(radix)
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val digs = digits(radix)
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val w = abs.getWidth
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require(w > 0)
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var q = abs
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var s = digs(q % rad)
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var needSign = neg
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for (i <- 1 until ceil(log(2)/log(radix)*w).toInt) {
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q = q / rad
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val placeSpace = q === UFix(0)
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val space = Mux(needSign, Str('-'), Str(' '))
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needSign = needSign && !placeSpace
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s = Cat(Mux(placeSpace, space, digs(q % rad)), s)
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}
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Cat(Mux(needSign, Str('-'), Str(' ')), s)
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}
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}
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def bigIntToString(x: BigInt): String = {
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val s = new StringBuilder
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var b = x
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while (b != 0) {
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s += (x & 0xFF).toChar
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b = b >> 8
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}
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s.toString
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}
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private def digit(d: Int): Char = (if (d < 10) '0'+d else 'a'-10+d).toChar
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private def digits(radix: Int): Vec[Bits] =
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AVec((0 until radix).map(i => Str(digit(i))))
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private def validChar(x: Char) = x == (x & 0xFF)
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}
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object Split
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{
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// is there a better way to do do this?
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