From 943c36954d676c9f4f3b4ad64b7ce5933d19bc21 Mon Sep 17 00:00:00 2001 From: "Wesley W. Terpstra" Date: Fri, 16 Sep 2016 13:45:05 -0700 Subject: [PATCH] tilelink2 RegField: .bytes should update more than one byte! --- src/main/scala/uncore/tilelink2/RegField.scala | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/src/main/scala/uncore/tilelink2/RegField.scala b/src/main/scala/uncore/tilelink2/RegField.scala index 3a49659f..7a51cb1f 100644 --- a/src/main/scala/uncore/tilelink2/RegField.scala +++ b/src/main/scala/uncore/tilelink2/RegField.scala @@ -110,12 +110,12 @@ object RegField // The bytes can be individually written, as they are one byte per field def bytes(x: UInt, base: Int = 0, beatBytes: Int = 4): Seq[RegField.Map] = { require (x.getWidth % 8 == 0) + val bytes = Seq.tabulate(x.getWidth/8) { i => x(8*(i+1)-1, 8*i) } + val wires = bytes.map { b => Wire(init = b) } + x := Cat(wires.reverse) Seq.tabulate(x.getWidth/8) { i => - RegField(8, x(8*(i+1)-1, 8*i), RegWriteFn { (valid, data) => - when (valid) { - val mask = ~UInt(BigInt(0xff) << 8*i, width = x.getWidth) - x := (x & mask) | (data & UInt(0xff)) << 8*i - } + RegField(8, bytes(i), RegWriteFn { (valid, data) => + when (valid) { wires(i) := data } Bool(true) }) }.grouped(beatBytes).toSeq.zipWithIndex.map { case (reg, i) =>