riscv/rocket-chip
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Artefact output (#545)

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* build: stop using empty .prm file

* generator: general-purpose mechanism for creating elaboration artefacts
This commit is contained in:
Wesley W. Terpstra
2017-02-02 19:24:55 -08:00
committed by GitHub
parent 094b3bc2b1
commit 93b2fa197e
10 changed files with 25 additions and 69 deletions
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6
src/main/scala/coreplex/RISCVPlatform.scala
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@ -31,9 +31,7 @@ trait CoreplexRISCVPlatform extends CoreplexNetwork {
lazy val configString = {
val managers = l1tol2.node.edgesIn(0).manager.managers
// Use the existing config string if the user overrode it
ConfigStringOutput.contents.getOrElse(
rocketchip.GenerateConfigString(p, clint, plic, managers))
rocketchip.GenerateConfigString(p, clint, plic, managers)
}
}
@ -58,5 +56,5 @@ trait CoreplexRISCVPlatformModule extends CoreplexNetworkModule {
outer.clint.module.io.rtcTick := Reg(init = Bool(false), next=(rtcSync & (~rtcLast)))
println(s"\nGenerated Configuration String\n${outer.configString}")
ConfigStringOutput.contents = Some(outer.configString)
ElaborationArtefacts.add("cfg", outer.configString)
}