riscv/rocket-chip
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Henry Cook 2016-09-22 17:28:34 -07:00 committed by GitHub
parent 673efb400d
commit 91aab2fabc
1 changed files with 1 additions and 1 deletions
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regression/Makefile
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@ -52,7 +52,7 @@ endif
ifeq ($(SUITE),UnittestSuite) ifeq ($(SUITE),UnittestSuite)
PROJECT=unittest PROJECT=unittest
CONFIGS=JunctionsUnitTestConfig, UncoreUnitTestConfig CONFIGS=JunctionsUnitTestConfig UncoreUnitTestConfig
endif endif
ifeq ($(SUITE), JtagDtmSuite) ifeq ($(SUITE), JtagDtmSuite)