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tilelink2: forward declarations for message constructors

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This commit is contained in:
Wesley W. Terpstra 2016-08-26 15:32:20 -07:00
parent 4649c42f50
commit 917a9c8e5d
1 changed files with 28 additions and 28 deletions
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56
uncore/src/main/scala/tilelink2/Operations.scala
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@ -56,7 +56,7 @@ class TLEdgeOut(
def Acquire(fromSource: UInt, toAddress: UInt, lgSize: UInt, growPermissions: UInt) = {
require (manager.anySupportAcquire)
val legal = manager.supportsAcquire(toAddress, lgSize)
val a = new TLBundleA(bundle)
val a = Wire(new TLBundleA(bundle))
a.opcode := TLMessages.Acquire
a.param := growPermissions
a.size := lgSize
@ -70,7 +70,7 @@ class TLEdgeOut(
def Release(fromSource: UInt, toAddress: UInt, lgSize: UInt, shrinkPermissions: UInt) = {
require (manager.anySupportAcquire)
val legal = manager.supportsAcquire(toAddress, lgSize)
val c = new TLBundleC(bundle)
val c = Wire(new TLBundleC(bundle))
c.opcode := TLMessages.Release
c.param := shrinkPermissions
c.size := lgSize
@ -83,7 +83,7 @@ class TLEdgeOut(
def Release(fromSource: UInt, toAddress: UInt, lgSize: UInt, shrinkPermissions: UInt, data: UInt) = {
require (manager.anySupportAcquire)
val legal = manager.supportsAcquire(toAddress, lgSize)
val c = new TLBundleC(bundle)
val c = Wire(new TLBundleC(bundle))
c.opcode := TLMessages.ReleaseData
c.param := shrinkPermissions
c.size := lgSize
@ -94,7 +94,7 @@ class TLEdgeOut(
}
def ProbeAck(toAddress: UInt, lgSize: UInt, reportPermissions: UInt) = {
val c = new TLBundleC(bundle)
val c = Wire(new TLBundleC(bundle))
c.opcode := TLMessages.ProbeAck
c.param := reportPermissions
c.size := lgSize
@ -105,7 +105,7 @@ class TLEdgeOut(
}
def ProbeAck(toAddress: UInt, lgSize: UInt, reportPermissions: UInt, data: UInt) = {
val c = new TLBundleC(bundle)
val c = Wire(new TLBundleC(bundle))
c.opcode := TLMessages.ProbeAckData
c.param := reportPermissions
c.size := lgSize
@ -116,7 +116,7 @@ class TLEdgeOut(
}
def GrantAck(toSink: UInt) = {
val e = new TLBundleE(bundle)
val e = Wire(new TLBundleE(bundle))
e.sink := toSink
e
}
@ -125,7 +125,7 @@ class TLEdgeOut(
def Get(fromSource: UInt, toAddress: UInt, lgSize: UInt) = {
require (manager.anySupportGet)
val legal = manager.supportsGet(toAddress, lgSize)
val a = new TLBundleA(bundle)
val a = Wire(new TLBundleA(bundle))
a.opcode := TLMessages.Get
a.param := UInt(0)
a.size := lgSize
@ -139,7 +139,7 @@ class TLEdgeOut(
def Put(fromSource: UInt, toAddress: UInt, lgSize: UInt, data: UInt) = {
require (manager.anySupportPutFull)
val legal = manager.supportsPutFull(toAddress, lgSize)
val a = new TLBundleA(bundle)
val a = Wire(new TLBundleA(bundle))
a.opcode := TLMessages.PutFullData
a.param := UInt(0)
a.size := lgSize
@ -153,7 +153,7 @@ class TLEdgeOut(
def Put(fromSource: UInt, toAddress: UInt, lgSize: UInt, data: UInt, wmask: UInt) = {
require (manager.anySupportPutPartial)
val legal = manager.supportsPutPartial(toAddress, lgSize)
val a = new TLBundleA(bundle)
val a = Wire(new TLBundleA(bundle))
a.opcode := TLMessages.PutPartialData
a.param := UInt(0)
a.size := lgSize
@ -167,7 +167,7 @@ class TLEdgeOut(
def Arithmetic(fromSource: UInt, toAddress: UInt, lgSize: UInt, data: UInt, atomic: UInt) = {
require (manager.anySupportArithmetic)
val legal = manager.supportsArithmetic(toAddress, lgSize)
val a = new TLBundleA(bundle)
val a = Wire(new TLBundleA(bundle))
a.opcode := TLMessages.ArithmeticData
a.param := atomic
a.size := lgSize
@ -181,7 +181,7 @@ class TLEdgeOut(
def Logical(fromSource: UInt, toAddress: UInt, lgSize: UInt, data: UInt, atomic: UInt) = {
require (manager.anySupportLogical)
val legal = manager.supportsLogical(toAddress, lgSize)
val a = new TLBundleA(bundle)
val a = Wire(new TLBundleA(bundle))
a.opcode := TLMessages.LogicalData
a.param := atomic
a.size := lgSize
@ -195,7 +195,7 @@ class TLEdgeOut(
def Hint(fromSource: UInt, toAddress: UInt, lgSize: UInt, param: UInt) = {
require (manager.anySupportHint)
val legal = manager.supportsHint(toAddress)
val a = new TLBundleA(bundle)
val a = Wire(new TLBundleA(bundle))
a.opcode := TLMessages.Hint
a.param := param
a.size := lgSize
@ -207,7 +207,7 @@ class TLEdgeOut(
}
def AccessAck(toAddress: UInt, lgSize: UInt) = {
val c = new TLBundleC(bundle)
val c = Wire(new TLBundleC(bundle))
c.opcode := TLMessages.AccessAck
c.param := UInt(0)
c.size := lgSize
@ -218,7 +218,7 @@ class TLEdgeOut(
}
def AccessAckError(toAddress: UInt, lgSize: UInt) = {
val c = new TLBundleC(bundle)
val c = Wire(new TLBundleC(bundle))
c.opcode := TLMessages.AccessAckError
c.param := UInt(0)
c.size := lgSize
@ -229,7 +229,7 @@ class TLEdgeOut(
}
def AccessAck(toAddress: UInt, lgSize: UInt, data: UInt) = {
val c = new TLBundleC(bundle)
val c = Wire(new TLBundleC(bundle))
c.opcode := TLMessages.AccessAckData
c.param := UInt(0)
c.size := lgSize
@ -249,7 +249,7 @@ class TLEdgeIn(
def Probe(fromAddress: UInt, toSource: UInt, lgSize: UInt, capPermissions: UInt) = {
require (client.anySupportProbe)
val legal = client.supportsProbe(fromAddress, lgSize)
val b = new TLBundleB(bundle)
val b = Wire(new TLBundleB(bundle))
b.opcode := TLMessages.Probe
b.param := capPermissions
b.size := lgSize
@ -261,7 +261,7 @@ class TLEdgeIn(
}
def Grant(fromSink: UInt, toSource: UInt, lgSize: UInt, capPermissions: UInt) = {
val d = new TLBundleD(bundle)
val d = Wire(new TLBundleD(bundle))
d.opcode := TLMessages.Grant
d.param := capPermissions
d.size := lgSize
@ -272,7 +272,7 @@ class TLEdgeIn(
}
def GrantData(fromSink: UInt, toSource: UInt, lgSize: UInt, capPermissions: UInt, data: UInt) = {
val d = new TLBundleD(bundle)
val d = Wire(new TLBundleD(bundle))
d.opcode := TLMessages.GrantData
d.param := capPermissions
d.size := lgSize
@ -283,7 +283,7 @@ class TLEdgeIn(
}
def ReleaseAck(toSource: UInt, lgSize: UInt) = {
val d = new TLBundleD(bundle)
val d = Wire(new TLBundleD(bundle))
d.opcode := TLMessages.ReleaseAck
d.param := UInt(0)
d.size := lgSize
@ -297,7 +297,7 @@ class TLEdgeIn(
def Get(fromAddress: UInt, toSource: UInt, lgSize: UInt) = {
require (client.anySupportGet)
val legal = client.supportsGet(toSource, lgSize)
val b = new TLBundleB(bundle)
val b = Wire(new TLBundleB(bundle))
b.opcode := TLMessages.Get
b.param := UInt(0)
b.size := lgSize
@ -311,7 +311,7 @@ class TLEdgeIn(
def Put(fromAddress: UInt, toSource: UInt, lgSize: UInt, data: UInt) = {
require (client.anySupportPutFull)
val legal = client.supportsPutFull(toSource, lgSize)
val b = new TLBundleB(bundle)
val b = Wire(new TLBundleB(bundle))
b.opcode := TLMessages.PutFullData
b.param := UInt(0)
b.size := lgSize
@ -325,7 +325,7 @@ class TLEdgeIn(
def Put(fromAddress: UInt, toSource: UInt, lgSize: UInt, data: UInt, wmask: UInt) = {
require (client.anySupportPutPartial)
val legal = client.supportsPutPartial(toSource, lgSize)
val b = new TLBundleB(bundle)
val b = Wire(new TLBundleB(bundle))
b.opcode := TLMessages.PutPartialData
b.param := UInt(0)
b.size := lgSize
@ -339,7 +339,7 @@ class TLEdgeIn(
def Arithmetic(fromAddress: UInt, toSource: UInt, lgSize: UInt, data: UInt, atomic: UInt) = {
require (client.anySupportArithmetic)
val legal = client.supportsArithmetic(toSource, lgSize)
val b = new TLBundleB(bundle)
val b = Wire(new TLBundleB(bundle))
b.opcode := TLMessages.ArithmeticData
b.param := atomic
b.size := lgSize
@ -353,7 +353,7 @@ class TLEdgeIn(
def Logical(fromAddress: UInt, toSource: UInt, lgSize: UInt, data: UInt, atomic: UInt) = {
require (client.anySupportLogical)
val legal = client.supportsLogical(toSource, lgSize)
val b = new TLBundleB(bundle)
val b = Wire(new TLBundleB(bundle))
b.opcode := TLMessages.LogicalData
b.param := atomic
b.size := lgSize
@ -367,7 +367,7 @@ class TLEdgeIn(
def Hint(fromAddress: UInt, toSource: UInt, lgSize: UInt, param: UInt) = {
require (client.anySupportHint)
val legal = client.supportsHint(toSource)
val b = new TLBundleB(bundle)
val b = Wire(new TLBundleB(bundle))
b.opcode := TLMessages.Hint
b.param := param
b.size := lgSize
@ -379,7 +379,7 @@ class TLEdgeIn(
}
def AccessAck(toSource: UInt, lgSize: UInt) = {
val d = new TLBundleD(bundle)
val d = Wire(new TLBundleD(bundle))
d.opcode := TLMessages.AccessAck
d.param := UInt(0)
d.size := lgSize
@ -390,7 +390,7 @@ class TLEdgeIn(
}
def AccessAckError(toSource: UInt, lgSize: UInt) = {
val d = new TLBundleD(bundle)
val d = Wire(new TLBundleD(bundle))
d.opcode := TLMessages.AccessAckError
d.param := UInt(0)
d.size := lgSize
@ -401,7 +401,7 @@ class TLEdgeIn(
}
def AccessAck(toSource: UInt, lgSize: UInt, data: UInt) = {
val d = new TLBundleD(bundle)
val d = Wire(new TLBundleD(bundle))
d.opcode := TLMessages.AccessAckData
d.param := UInt(0)
d.size := lgSize