riscv/rocket-chip
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fix unalloc putblocks

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This commit is contained in:
Henry Cook 2015-05-14 12:37:35 -07:00
parent a7fa77c7fc
commit 90c9ee7b04
2 changed files with 11 additions and 9 deletions
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18
uncore/src/main/scala/cache.scala
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@ -711,7 +711,7 @@ class L2AcquireTracker(trackerId: Int) extends L2XactTracker {
xact.conflicts(io.iacq()) && xact.conflicts(io.iacq()) &&
state != s_idle && state != s_meta_write && state != s_idle && state != s_meta_write &&
!all_pending_done && !all_pending_done &&
xact.allocate() && (xact.allocate() || xact.isBuiltInType(Acquire.putBlockType)) &&
!io.inner.release.fire() && !io.inner.release.fire() &&
!io.outer.grant.fire() && !io.outer.grant.fire() &&
!io.data.resp.valid && !io.data.resp.valid &&
@ -766,14 +766,16 @@ class L2AcquireTracker(trackerId: Int) extends L2XactTracker {
// If we're allocating in this cache, we can use the current metadata // If we're allocating in this cache, we can use the current metadata
// to make an appropriate custom Acquire, otherwise we copy over the // to make an appropriate custom Acquire, otherwise we copy over the
// built-in Acquire from the inner TL to the outer TL // built-in Acquire from the inner TL to the outer TL
io.outer.acquire.valid := state === s_outer_acquire io.outer.acquire.valid := state === s_outer_acquire &&
(xact.allocate() || !pending_puts(oacq_data_idx))
io.outer.acquire.bits := Mux( io.outer.acquire.bits := Mux(
xact.allocate(), xact.allocate(),
xact_old_meta.coh.outer.makeAcquire( xact_old_meta.coh.outer.makeAcquire(
client_xact_id = UInt(0), client_xact_id = UInt(0),
addr_block = xact.addr_block, addr_block = xact.addr_block,
op_code = xact.op_code()), op_code = xact.op_code()),
Bundle(Acquire(xact))(outerTLParams)) Bundle(Acquire(xact))(outerTLParams))
io.oacq().data := data_buffer(oacq_data_idx)
// Handle the response from outer memory // Handle the response from outer memory
io.outer.grant.ready := state === s_busy io.outer.grant.ready := state === s_busy

2
uncore/src/main/scala/htif.scala
View File

@ -180,7 +180,7 @@ class HTIF(pcr_RESET: Int) extends Module with HTIFParameters {
addr_block = init_addr, addr_block = init_addr,
addr_beat = cnt, addr_beat = cnt,
client_xact_id = UInt(0), client_xact_id = UInt(0),
data = mem_req_data), data = mem_req_data),
GetBlock(addr_block = init_addr)) GetBlock(addr_block = init_addr))
io.mem.grant.ready := Bool(true) io.mem.grant.ready := Bool(true)