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Bump chisel and firrtl (#1232)

* Misc changes to better enable autoclonetype
* Bump chisel3 and firrtl and SBT to 1.1.1
This commit is contained in:
Jack Koenig
2018-03-01 15:19:12 -08:00
committed by GitHub
parent 20a8876856
commit 8c6e745653
10 changed files with 10 additions and 22 deletions

View File

@ -11,7 +11,7 @@ final case class HeterogeneousBag[T <: Data](elts: Seq[T]) extends Record with c
def length = elts.length
val elements = ListMap(elts.zipWithIndex.map { case (n,i) => (i.toString, n) }:_*)
override def cloneType: this.type = (new HeterogeneousBag(elts.map(_.cloneType))).asInstanceOf[this.type]
override def cloneType: this.type = (new HeterogeneousBag(elts.map(_.chiselCloneType))).asInstanceOf[this.type]
// IndexedSeq has its own hashCode/equals that we must not use
override def hashCode: Int = super[Record].hashCode

View File

@ -8,19 +8,7 @@ import chisel3.experimental.{ChiselAnnotation, RawModule}
import freechips.rocketchip.config.Parameters
import scala.math._
class ParameterizedBundle(implicit p: Parameters) extends Bundle {
override def cloneType = {
try {
this.getClass.getConstructors.head.newInstance(p).asInstanceOf[this.type]
} catch {
case e: java.lang.IllegalArgumentException =>
throwException("Unable to use ParamaterizedBundle.cloneType on " +
this.getClass + ", probably because " + this.getClass +
"() takes more than one argument. Consider overriding " +
"cloneType() on " + this.getClass, e)
}
}
}
class ParameterizedBundle(implicit p: Parameters) extends Bundle
// TODO: replace this with an implicit class when @chisel unprotects dontTouchPorts
trait DontTouch {
@ -101,7 +89,7 @@ object ValidMux {
apply(v1 +: v2.toSeq)
}
def apply[T <: Data](valids: Seq[ValidIO[T]]): ValidIO[T] = {
val out = Wire(Valid(valids.head.bits))
val out = Wire(Valid(valids.head.bits.cloneType))
out.valid := valids.map(_.valid).reduce(_ || _)
out.bits := MuxCase(valids.head.bits,
valids.map(v => (v.valid -> v.bits)))