separate out common functionality
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@ -31,41 +31,6 @@ trait HasGeneratorParams {
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require(startAddress % genWordBytes == 0)
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}
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class Timer(initCount: Int) extends Module {
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val io = new Bundle {
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val start = Bool(INPUT)
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val stop = Bool(INPUT)
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val timeout = Bool(OUTPUT)
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}
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val countdown = Reg(UInt(width = log2Up(initCount)))
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val active = Reg(init = Bool(false))
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when (io.start) {
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countdown := UInt(initCount - 1)
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active := Bool(true)
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}
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when (io.stop) {
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active := Bool(false)
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}
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when (active) {
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countdown := countdown - UInt(1)
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}
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io.timeout := countdown === UInt(0)
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}
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object Timer {
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def apply(initCount: Int, start: Bool, stop: Bool): Bool = {
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val timer = Module(new Timer(initCount))
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timer.io.start := start
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timer.io.stop := stop
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timer.io.timeout
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}
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}
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class UncachedTileLinkGenerator(id: Int)
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(implicit p: Parameters) extends TLModule()(p) with HasGeneratorParams {
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@ -3,6 +3,7 @@ package groundtest
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import Chisel._
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import rocket._
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import uncore._
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import junctions.SMIIO
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import scala.util.Random
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import cde.Parameters
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@ -33,6 +34,33 @@ class DummyCache(implicit val p: Parameters) extends Module
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}
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}
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class CSRHandler(implicit val p: Parameters) extends Module {
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private val csrDataBits = 64
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private val csrAddrBits = 12
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val io = new Bundle {
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val finished = Bool(INPUT)
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val csr = new SMIIO(csrDataBits, csrAddrBits).flip
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}
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val csr_resp_valid = Reg(Bool()) // Don't reset
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val csr_resp_data = Reg(UInt(width = csrDataBits))
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io.csr.req.ready := Bool(true)
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io.csr.resp.valid := csr_resp_valid
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io.csr.resp.bits := csr_resp_data
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when (io.csr.req.fire()) {
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val req = io.csr.req.bits
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csr_resp_valid := Bool(true)
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csr_resp_data := Mux(req.addr === UInt(CSRs.mtohost), io.finished, req.data)
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}
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when (io.csr.resp.fire()) {
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csr_resp_valid := Bool(false)
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}
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}
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class GeneratorTile(id: Int, resetSignal: Bool)
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(implicit val p: Parameters) extends Tile(resetSignal)(p)
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with HasGeneratorParams {
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@ -83,21 +111,8 @@ class GeneratorTile(id: Int, resetSignal: Bool)
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}
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val all_done = gen_finished.reduce(_ && _)
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val csr_resp_valid = Reg(Bool()) // Don't reset
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val csr_resp_data = Reg(io.host.csr.resp.bits)
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io.host.csr.req.ready := Bool(true)
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io.host.csr.resp.valid := csr_resp_valid
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io.host.csr.resp.bits := csr_resp_data
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when (io.host.csr.req.fire()) {
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val req = io.host.csr.req.bits
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csr_resp_valid := Bool(true)
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csr_resp_data := Mux(req.addr === UInt(CSRs.mtohost), all_done, req.data)
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val csr = Module(new CSRHandler)
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csr.io.finished := all_done
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csr.io.csr <> io.host.csr
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}
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when (io.host.csr.resp.fire()) {
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csr_resp_valid := Bool(false)
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}
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}
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38
groundtest/src/main/scala/util.scala
Normal file
38
groundtest/src/main/scala/util.scala
Normal file
@ -0,0 +1,38 @@
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package groundtest
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import Chisel._
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class Timer(initCount: Int) extends Module {
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val io = new Bundle {
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val start = Bool(INPUT)
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val stop = Bool(INPUT)
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val timeout = Bool(OUTPUT)
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}
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val countdown = Reg(UInt(width = log2Up(initCount)))
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val active = Reg(init = Bool(false))
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when (io.start) {
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countdown := UInt(initCount - 1)
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active := Bool(true)
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}
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when (io.stop) {
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active := Bool(false)
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}
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when (active) {
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countdown := countdown - UInt(1)
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}
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io.timeout := countdown === UInt(0)
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}
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object Timer {
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def apply(initCount: Int, start: Bool, stop: Bool): Bool = {
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val timer = Module(new Timer(initCount))
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timer.io.start := start
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timer.io.stop := stop
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timer.io.timeout
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}
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}
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