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axi4: conversion from TL does not need beatBytes (#1051)

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We used to pack the addr_lo into user bits. We don't do that anymore.
There is thus no need to waste those bits, nor to pass that arg.
This commit is contained in:
Wesley W. Terpstra
2017-10-12 16:41:54 -07:00
committed by GitHub
parent 21b5367259
commit 8b58327fa4
4 changed files with 15 additions and 15 deletions
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14
src/main/scala/tilelink/ToAXI4.scala
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@ -10,7 +10,7 @@ import freechips.rocketchip.util._
import freechips.rocketchip.amba.axi4._
import scala.math.{min, max}
case class TLToAXI4Node(beatBytes: Int, stripBits: Int = 0)(implicit valName: ValName) extends MixedAdapterNode(TLImp, AXI4Imp)(
case class TLToAXI4Node(stripBits: Int = 0)(implicit valName: ValName) extends MixedAdapterNode(TLImp, AXI4Imp)(
dFn = { p =>
p.clients.foreach { c =>
require (c.sourceId.start % (1 << stripBits) == 0 &&
@ -30,7 +30,7 @@ case class TLToAXI4Node(beatBytes: Int, stripBits: Int = 0)(implicit valName: Va
}
AXI4MasterPortParameters(
masters = masters,
userBits = log2Ceil(p.endSourceId) + 4 + log2Ceil(beatBytes))
userBits = log2Ceil(p.endSourceId) + 4)
},
uFn = { p => TLManagerPortParameters(
managers = p.slaves.map { case s =>
@ -48,9 +48,9 @@ case class TLToAXI4Node(beatBytes: Int, stripBits: Int = 0)(implicit valName: Va
minLatency = p.minLatency)
})
class TLToAXI4(val beatBytes: Int, val combinational: Boolean = true, val adapterName: Option[String] = None, val stripBits: Int = 0)(implicit p: Parameters) extends LazyModule
class TLToAXI4(val combinational: Boolean = true, val adapterName: Option[String] = None, val stripBits: Int = 0)(implicit p: Parameters) extends LazyModule
{
val node = TLToAXI4Node(beatBytes, stripBits)
val node = TLToAXI4Node(stripBits)
lazy val module = new LazyModuleImp(this) {
(node.in zip node.out) foreach { case ((in, edgeIn), (out, edgeOut)) =>
@ -215,9 +215,9 @@ class TLToAXI4(val beatBytes: Int, val combinational: Boolean = true, val adapte
object TLToAXI4
{
// applied to the TL source node; y.node := TLToAXI4(beatBytes)(x.node)
def apply(beatBytes: Int, combinational: Boolean = true, adapterName: Option[String] = None, stripBits: Int = 0)(x: TLOutwardNode)(implicit p: Parameters, sourceInfo: SourceInfo): AXI4OutwardNode = {
val axi4 = LazyModule(new TLToAXI4(beatBytes, combinational, adapterName, stripBits))
// applied to the TL source node; y.node := TLToAXI4()(x.node)
def apply(combinational: Boolean = true, adapterName: Option[String] = None, stripBits: Int = 0)(x: TLOutwardNode)(implicit p: Parameters, sourceInfo: SourceInfo): AXI4OutwardNode = {
val axi4 = LazyModule(new TLToAXI4(combinational, adapterName, stripBits))
axi4.node :=? x
axi4.node
}