riscv/rocket-chip
1
0 Fork 0
Code Releases Activity

fix external memory request nack logic

Browse Source
This commit is contained in:
Andrew Waterman committed 2012-02-15 18:57:40 -08:00
1 parent fe2c1d1321
commit 8b3b3abd3d
1 file changed
+1 -1
Download Patch File Download Diff File Expand all files Collapse all files
rocket/src/main/scala/ctrl.scala
+1 -1
View File
@@ -806,7 +806,7 @@ class rocketCtrl extends Component
io.dmem.req_cmd := ex_reg_mem_cmd; io.dmem.req_cmd := ex_reg_mem_cmd;
io.dmem.req_type := ex_reg_mem_type; io.dmem.req_type := ex_reg_mem_type;
io.ext_mem.resp_nack:= mem_reg_ext_mem_val && (io.dmem.resp_nack || Reg(!io.dmem.req_rdy)) io.ext_mem.resp_nack:= mem_reg_ext_mem_val && (io.dmem.req_kill || io.dmem.resp_nack || Reg(!io.dmem.req_rdy))
} }
} }