riscv/rocket-chip
1
0
Fork 0
Code Releases Activity

generalize TwoWayCounter

Browse Source
This commit is contained in:
Howard Mao 2015-11-19 15:04:09 -08:00
parent a48237f36d
commit 8a61177224
2 changed files with 10 additions and 4 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

5
uncore/src/main/scala/tilelink.scala
View File

@ -1386,14 +1386,11 @@ trait HasDataBeatCounters {
down: DecoupledIO[S], down: DecoupledIO[S],
beat: UInt = UInt(0), beat: UInt = UInt(0),
track: T => Bool = (t: T) => Bool(true)): (Bool, UInt, Bool, UInt, Bool) = { track: T => Bool = (t: T) => Bool(true)): (Bool, UInt, Bool, UInt, Bool) = {
val cnt = Reg(init = UInt(0, width = log2Up(max+1)))
val (up_idx, up_done) = connectDataBeatCounter(up.fire(), up.bits, beat) val (up_idx, up_done) = connectDataBeatCounter(up.fire(), up.bits, beat)
val (down_idx, down_done) = connectDataBeatCounter(down.fire(), down.bits, beat) val (down_idx, down_done) = connectDataBeatCounter(down.fire(), down.bits, beat)
val do_inc = up_done && track(up.bits) val do_inc = up_done && track(up.bits)
val do_dec = down_done val do_dec = down_done
cnt := Mux(do_dec, val cnt = TwoWayCounter(do_inc, do_dec, max)
Mux(do_inc, cnt, cnt - UInt(1)),
Mux(do_inc, cnt + UInt(1), cnt))
(cnt > UInt(0), up_idx, up_done, down_idx, down_done) (cnt > UInt(0), up_idx, up_done, down_idx, down_done)
} }
} }

9
uncore/src/main/scala/util.scala
View File

@ -42,6 +42,15 @@ object ZCounter {
} }
} }
object TwoWayCounter {
def apply(up: Bool, down: Bool, max: Int): UInt = {
val cnt = Reg(init = UInt(0, log2Up(max+1)))
when (up && !down) { cnt := cnt + UInt(1) }
when (down && !up) { cnt := cnt - UInt(1) }
cnt
}
}
class FlowThroughSerializer[T <: Bundle with HasTileLinkData](gen: T, n: Int) extends Module { class FlowThroughSerializer[T <: Bundle with HasTileLinkData](gen: T, n: Int) extends Module {
val io = new Bundle { val io = new Bundle {
val in = Decoupled(gen).flip val in = Decoupled(gen).flip