riscv/rocket-chip
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generalize TwoWayCounter

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This commit is contained in:
Howard Mao
2015-11-19 15:04:09 -08:00
parent a48237f36d
commit 8a61177224
2 changed files with 10 additions and 4 deletions
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5
uncore/src/main/scala/tilelink.scala
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@ -1386,14 +1386,11 @@ trait HasDataBeatCounters {
down: DecoupledIO[S],
beat: UInt = UInt(0),
track: T => Bool = (t: T) => Bool(true)): (Bool, UInt, Bool, UInt, Bool) = {
val cnt = Reg(init = UInt(0, width = log2Up(max+1)))
val (up_idx, up_done) = connectDataBeatCounter(up.fire(), up.bits, beat)
val (down_idx, down_done) = connectDataBeatCounter(down.fire(), down.bits, beat)
val do_inc = up_done && track(up.bits)
val do_dec = down_done
cnt := Mux(do_dec,
Mux(do_inc, cnt, cnt - UInt(1)),
Mux(do_inc, cnt + UInt(1), cnt))
val cnt = TwoWayCounter(do_inc, do_dec, max)
(cnt > UInt(0), up_idx, up_done, down_idx, down_done)
}
}