From 8a4f95e617744f8ca9c64d0ea9a07cb6f4a27ce2 Mon Sep 17 00:00:00 2001 From: Yunsup Lee Date: Sat, 17 Mar 2012 17:50:37 -0700 Subject: [PATCH] changes to xcpt handling --- rocket/src/main/scala/cpu.scala | 2 +- rocket/src/main/scala/dpath_vec.scala | 2 ++ 2 files changed, 3 insertions(+), 1 deletion(-) diff --git a/rocket/src/main/scala/cpu.scala b/rocket/src/main/scala/cpu.scala index 21a27d3e..b9ab1058 100644 --- a/rocket/src/main/scala/cpu.scala +++ b/rocket/src/main/scala/cpu.scala @@ -170,7 +170,7 @@ class rocketProc(resetSignal: Bool = null) extends Component(resetSignal) vu.io.vec_ximm2q.valid := ctrl.io.vec_iface.vximm2q_valid vu.io.vec_ximm2q.bits := dpath.io.vec_iface.vximm2q_bits vu.io.vec_cntq.valid := ctrl.io.vec_iface.vcntq_valid - vu.io.vec_cntq.bits := dpath.io.vec_iface.vcntq_bits + vu.io.vec_cntq.bits := Cat(dpath.io.vec_iface.vcntq_last, dpath.io.vec_iface.vcntq_bits) // prefetch queues vu.io.vec_pfcmdq.valid := ctrl.io.vec_iface.vpfcmdq_valid diff --git a/rocket/src/main/scala/dpath_vec.scala b/rocket/src/main/scala/dpath_vec.scala index 48ae3d34..f36bff23 100644 --- a/rocket/src/main/scala/dpath_vec.scala +++ b/rocket/src/main/scala/dpath_vec.scala @@ -12,6 +12,7 @@ class ioDpathVecInterface extends Bundle val vximm1q_bits = Bits(SZ_VIMM, OUTPUT) val vximm2q_bits = Bits(SZ_VSTRIDE, OUTPUT) val vcntq_bits = Bits(SZ_VLEN, OUTPUT) + val vcntq_last = Bool(OUTPUT) val evac_addr = Bits(64, OUTPUT) val irq_aux = Bits(64, INPUT) } @@ -159,6 +160,7 @@ class rocketDpathVec extends Component io.wdata) // VIMM2_ALU io.iface.vcntq_bits := io.wdata(SZ_VLEN-1, 0) + io.iface.vcntq_last := io.rs2(1) io.iface.evac_addr := io.wdata