From ffffafc7c39e14040f453e47f8fff2c7e342d60f Mon Sep 17 00:00:00 2001 From: Megan Wachs Date: Mon, 23 Oct 2017 15:21:46 -0700 Subject: [PATCH] Add link to Diplomatic Design Patterns Paper --- README.md | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/README.md b/README.md index 07b234b6..2971e74d 100644 --- a/README.md +++ b/README.md @@ -167,7 +167,7 @@ clock-crossers and converters from TileLink to external bus protocols (e.g. AXI This RTL package contains implementations for peripheral devices, including the Debug module and various TL slaves. * **diplomacy** This utility package extends Chisel by allowing for two-phase hardware elaboration, in which certain parameters -are dynamically negotiated between modules. +are dynamically negotiated between modules. For more information about diplomacy, see [this paper](https://carrv.github.io/papers/cook-diplomacy-carrv2017.pdf). * **groundtest** This RTL package generates synthesizeable hardware testers that emit randomized memory access streams in order to stress-tests the uncore memory hierarchy.