This reverts commit a542ae687e
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@ -59,7 +59,7 @@ class ICache(val icacheParams: ICacheParams, val hartid: Int)(implicit p: Parame
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Seq(TLManagerParameters(
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address = Seq(AddressSet(itimAddr, size-1)),
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resources = device.reg("mem"),
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regionType = RegionType.PUT_EFFECTS,
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regionType = RegionType.UNCACHEABLE,
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executable = true,
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supportsPutFull = TransferSizes(1, wordBytes),
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supportsPutPartial = TransferSizes(1, wordBytes),
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