diff --git a/regression/Makefile b/regression/Makefile index 7d222c4f..ca210738 100644 --- a/regression/Makefile +++ b/regression/Makefile @@ -39,13 +39,11 @@ $(error Set SUITE to the regression suite you want to run) endif ifeq ($(SUITE),RocketSuite) -MODEL=TestHarness PROJECT=rocketchip CONFIGS=DefaultConfig DefaultL2Config DefaultBufferlessConfig TinyConfig endif ifeq ($(SUITE),GroundtestSuite) -MODEL=TestHarness PROJECT=rocketchip CONFIGS=MemtestConfig MemtestBufferlessConfig MemtestStatelessConfig FancyMemtestConfig \ BroadcastRegressionTestConfig BufferlessRegressionTestConfig CacheRegressionTestConfig \ @@ -53,8 +51,7 @@ CONFIGS=MemtestConfig MemtestBufferlessConfig MemtestStatelessConfig FancyMemtes endif ifeq ($(SUITE),UnittestSuite) -MODEL=UnitTestHarness -PROJECT=rocketchip +PROJECT=rocketchip.utest CONFIGS=UnitTestConfig endif @@ -126,65 +123,65 @@ $(RISCV)/install.stamp: # Builds the various simulators stamps/%/emulator-verilog.stamp: stamps/other-submodules.stamp $(RISCV)/install.stamp mkdir -p $(dir $@) - +flock -x $(dir $@)/chisel-lock $(MAKE) -C $(abspath $(TOP))/emulator PROJECT=$(PROJECT) MODEL=$(MODEL) CONFIG=$* RISCV=$(abspath $(RISCV)) verilog + +flock -x $(dir $@)/chisel-lock $(MAKE) -C $(abspath $(TOP))/emulator PROJECT=$(PROJECT) CONFIG=$* RISCV=$(abspath $(RISCV)) verilog date > $@ stamps/%/emulator-ndebug.stamp: stamps/other-submodules.stamp $(RISCV)/install.stamp mkdir -p $(dir $@) - +flock -x $(dir $@)/chisel-lock $(MAKE) -C $(abspath $(TOP))/emulator PROJECT=$(PROJECT) MODEL=$(MODEL) CONFIG=$* RISCV=$(abspath $(RISCV)) + +flock -x $(dir $@)/chisel-lock $(MAKE) -C $(abspath $(TOP))/emulator PROJECT=$(PROJECT) CONFIG=$* RISCV=$(abspath $(RISCV)) date > $@ stamps/%/emulator-debug.stamp: stamps/other-submodules.stamp $(RISCV)/install.stamp mkdir -p $(dir $@) - +flock -x $(dir $@)/chisel-lock $(MAKE) -C $(abspath $(TOP))/emulator PROJECT=$(PROJECT) MODEL=$(MODEL) CONFIG=$* RISCV=$(abspath $(RISCV)) debug + +flock -x $(dir $@)/chisel-lock $(MAKE) -C $(abspath $(TOP))/emulator PROJECT=$(PROJECT) CONFIG=$* RISCV=$(abspath $(RISCV)) debug date > $@ stamps/%/vsim-verilog.stamp: stamps/other-submodules.stamp $(RISCV)/install.stamp mkdir -p $(dir $@) - +flock -x $(dir $@)/chisel-lock $(MAKE) -C $(abspath $(TOP))/vsim PROJECT=$(PROJECT) MODEL=$(MODEL) CONFIG=$* RISCV=$(abspath $(RISCV)) verilog + +flock -x $(dir $@)/chisel-lock $(MAKE) -C $(abspath $(TOP))/vsim PROJECT=$(PROJECT) CONFIG=$* RISCV=$(abspath $(RISCV)) verilog date > $@ stamps/%/vsim-ndebug.stamp: stamps/other-submodules.stamp $(RISCV)/install.stamp mkdir -p $(dir $@) - +flock -x $(dir $@)/chisel-lock $(MAKE) -C $(abspath $(TOP))/vsim PROJECT=$(PROJECT) MODEL=$(MODEL) CONFIG=$* RISCV=$(abspath $(RISCV)) + +flock -x $(dir $@)/chisel-lock $(MAKE) -C $(abspath $(TOP))/vsim PROJECT=$(PROJECT) CONFIG=$* RISCV=$(abspath $(RISCV)) date > $@ stamps/%/vsim-debug.stamp: stamps/other-submodules.stamp $(RISCV)/install.stamp mkdir -p $(dir $@) - +flock -x $(dir $@)/chisel-lock $(MAKE) -C $(abspath $(TOP))/vsim PROJECT=$(PROJECT) MODEL=$(MODEL) CONFIG=$* RISCV=$(abspath $(RISCV)) debug + +flock -x $(dir $@)/chisel-lock $(MAKE) -C $(abspath $(TOP))/vsim PROJECT=$(PROJECT) CONFIG=$* RISCV=$(abspath $(RISCV)) debug date > $@ # Runs tests on one of the simulators stamps/%/emulator-asm-tests.stamp: stamps/other-submodules.stamp $(RISCV)/install.stamp mkdir -p $(dir $@) - $(MAKE) -C $(abspath $(TOP))/emulator PROJECT=$(PROJECT) MODEL=$(MODEL) CONFIG=$* RISCV=$(abspath $(RISCV)) run-asm-tests-fast + $(MAKE) -C $(abspath $(TOP))/emulator PROJECT=$(PROJECT) CONFIG=$* RISCV=$(abspath $(RISCV)) run-asm-tests-fast date > $@ stamps/%/emulator-bmark-tests.stamp: stamps/other-submodules.stamp $(RISCV)/install.stamp mkdir -p $(dir $@) - $(MAKE) -C $(abspath $(TOP))/emulator PROJECT=$(PROJECT) MODEL=$(MODEL) CONFIG=$* RISCV=$(abspath $(RISCV)) run-bmark-tests-fast + $(MAKE) -C $(abspath $(TOP))/emulator PROJECT=$(PROJECT) CONFIG=$* RISCV=$(abspath $(RISCV)) run-bmark-tests-fast date > $@ stamps/%/emulator-regression-tests.stamp: stamps/other-submodules.stamp $(RISCV)/install.stamp mkdir -p $(dir $@) - $(MAKE) -C $(abspath $(TOP))/emulator PROJECT=$(PROJECT) MODEL=$(MODEL) CONFIG=$* RISCV=$(abspath $(RISCV)) clean-run-output - $(MAKE) -C $(abspath $(TOP))/emulator PROJECT=$(PROJECT) MODEL=$(MODEL) CONFIG=$* RISCV=$(abspath $(RISCV)) run-regression-tests-fast + $(MAKE) -C $(abspath $(TOP))/emulator PROJECT=$(PROJECT) CONFIG=$* RISCV=$(abspath $(RISCV)) clean-run-output + $(MAKE) -C $(abspath $(TOP))/emulator PROJECT=$(PROJECT) CONFIG=$* RISCV=$(abspath $(RISCV)) run-regression-tests-fast date > $@ stamps/%/vsim-asm-tests.stamp: stamps/other-submodules.stamp $(RISCV)/install.stamp mkdir -p $(dir $@) - $(MAKE) -C $(abspath $(TOP))/vsim PROJECT=$(PROJECT) MODEL=$(MODEL) CONFIG=$* RISCV=$(abspath $(RISCV)) run-asm-tests-fast + $(MAKE) -C $(abspath $(TOP))/vsim PROJECT=$(PROJECT) CONFIG=$* RISCV=$(abspath $(RISCV)) run-asm-tests-fast date > $@ stamps/%/vsim-bmark-tests.stamp: stamps/other-submodules.stamp $(RISCV)/install.stamp mkdir -p $(dir $@) - $(MAKE) -C $(abspath $(TOP))/vsim PROJECT=$(PROJECT) MODEL=$(MODEL) CONFIG=$* RISCV=$(abspath $(RISCV)) run-bmark-tests-fast + $(MAKE) -C $(abspath $(TOP))/vsim PROJECT=$(PROJECT) CONFIG=$* RISCV=$(abspath $(RISCV)) run-bmark-tests-fast date > $@ stamps/%/vsim-regression-tests.stamp: stamps/other-submodules.stamp $(RISCV)/install.stamp mkdir -p $(dir $@) - $(MAKE) -C $(abspath $(TOP))/vsim PROJECT=$(PROJECT) MODEL=$(MODEL) CONFIG=$* RISCV=$(abspath $(RISCV)) clean-run-output - $(MAKE) -C $(abspath $(TOP))/vsim PROJECT=$(PROJECT) MODEL=$(MODEL) CONFIG=$* RISCV=$(abspath $(RISCV)) run-regression-tests-fast + $(MAKE) -C $(abspath $(TOP))/vsim PROJECT=$(PROJECT) CONFIG=$* RISCV=$(abspath $(RISCV)) clean-run-output + $(MAKE) -C $(abspath $(TOP))/vsim PROJECT=$(PROJECT) CONFIG=$* RISCV=$(abspath $(RISCV)) run-regression-tests-fast date > $@ # The torture tests run subtly differently on the different targets, so they diff --git a/src/main/scala/rocketchip/UnitTest.scala b/src/main/scala/rocketchip/UnitTest.scala index 1d23e3c7..d310caac 100644 --- a/src/main/scala/rocketchip/UnitTest.scala +++ b/src/main/scala/rocketchip/UnitTest.scala @@ -1,6 +1,6 @@ // See LICENSE for license details. -package rocketchip +package rocketchip.utest import scala.collection.mutable.LinkedHashSet @@ -31,7 +31,7 @@ class WithUnitTest extends Config( class UnitTestConfig extends Config(new WithUnitTest ++ new BaseConfig) -class UnitTestHarness(implicit val p: Parameters) extends Module { +class TestHarness(implicit val p: Parameters) extends Module { val io = new Bundle { val success = Bool(OUTPUT) }