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diplomacy: fix the order of auto signals

This commit is contained in:
Wesley W. Terpstra 2017-09-25 18:09:03 -07:00
parent d22ec1eddf
commit 870ed3d219

View File

@ -154,12 +154,13 @@ sealed trait LazyModuleImpLike extends BaseModule
Module(c.module).dangles Module(c.module).dangles
} }
val nodeDangles = wrapper.nodes.reverse.flatMap(_.instantiate()) val nodeDangles = wrapper.nodes.reverse.flatMap(_.instantiate())
val (toConnect, toForward) = (nodeDangles ++ childDangles).groupBy(_.source).partition(_._2.size == 2) val allDangles = nodeDangles ++ childDangles
val forward = toForward.map(_._2(0)).toList val done = Set() ++ allDangles.groupBy(_.source).values.filter(_.size == 2).map { case Seq(a, b) =>
toConnect.foreach { case (_, Seq(a, b)) =>
require (a.flipped != b.flipped) require (a.flipped != b.flipped)
if (a.flipped) { a.data <> b.data } else { b.data <> a.data } if (a.flipped) { a.data <> b.data } else { b.data <> a.data }
a.source
} }
val forward = allDangles.filter(d => !done(d.source))
val auto = IO(new AutoBundle(forward.map { d => (d.name, d.data, d.flipped) }:_*)) val auto = IO(new AutoBundle(forward.map { d => (d.name, d.data, d.flipped) }:_*))
val dangles = (forward zip auto.elements) map { case (d, (_, io)) => val dangles = (forward zip auto.elements) map { case (d, (_, io)) =>
if (d.flipped) { d.data <> io } else { io <> d.data } if (d.flipped) { d.data <> io } else { io <> d.data }