From 84f249bd0360b89d86749e7c33b47eb0bf8e7f75 Mon Sep 17 00:00:00 2001 From: Henry Cook Date: Wed, 16 Nov 2016 18:11:06 -0800 Subject: [PATCH] [rocketchip] BigInt cast --- src/main/scala/rocketchip/Periphery.scala | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/main/scala/rocketchip/Periphery.scala b/src/main/scala/rocketchip/Periphery.scala index e433e0d8..1a2dd8a6 100644 --- a/src/main/scala/rocketchip/Periphery.scala +++ b/src/main/scala/rocketchip/Periphery.scala @@ -174,7 +174,7 @@ trait PeripheryMasterAXI4MMIO { val mmio_axi4 = AXI4BlindOutputNode(AXI4SlavePortParameters( slaves = Seq(AXI4SlaveParameters( - address = List(AddressSet(p(ExtBusBase), p(ExtBusSize)-1)), + address = List(AddressSet(BigInt(p(ExtBusBase)), p(ExtBusSize)-1)), executable = true, // Can we run programs on this memory? supportsWrite = TransferSizes(1, 256), // The slave supports 1-256 byte transfers supportsRead = TransferSizes(1, 256),