riscv/rocket-chip
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work in progress on hellacache

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This commit is contained in:
Andrew Waterman
2011-12-10 07:01:47 -08:00
parent ce201559f3
commit 8308345364
4 changed files with 172 additions and 368 deletions
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4
rocket/src/main/scala/dcache.scala
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@ -31,9 +31,9 @@ class ioDcache(view: List[String] = null) extends Bundle(view) {
val req_tag = UFix(DMEM_TAG_BITS, 'input);
val req_val = Bool('input);
val req_rdy = Bool('output);
val req_wdata = Bits(128, 'input);
val req_wdata = Bits(MEM_DATA_BITS, 'input);
val req_rw = Bool('input);
val resp_data = Bits(128, 'output);
val resp_data = Bits(MEM_DATA_BITS, 'output);
val resp_tag = Bits(DMEM_TAG_BITS, 'output);
val resp_val = Bool('output);
}