riscv/rocket-chip
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Simplify AsyncResetReg

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No need for AsyncSetReg, as AsyncResetReg can be used exclusively with
inverted inputs.
This commit is contained in:
Andrew Waterman
2016-10-08 20:36:43 -07:00
committed by Yunsup Lee
parent a84a961a39
commit 7f429e8799
3 changed files with 11 additions and 77 deletions
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2
vsim/Makefrag
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@ -7,8 +7,6 @@
bb_vsrcs = $(base_dir)/vsrc/DebugTransportModuleJtag.v \
$(base_dir)/vsrc/jtag_vpi.v \
$(base_dir)/vsrc/AsyncResetReg.v \
$(base_dir)/vsrc/AsyncSetReg.v \
sim_vsrcs = \
$(generated_dir)/$(long_name).v \