riscv/rocket-chip
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Simplify AsyncResetReg

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No need for AsyncSetReg, as AsyncResetReg can be used exclusively with
inverted inputs.
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Andrew Waterman authored and Yunsup Lee committed 2016-10-08 21:29:40 -07:00
1 parent a84a961a39
commit 7f429e8799
3 files changed
+11 -77
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vsim/Makefrag
-2
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@@ -7,8 +7,6 @@
bb_vsrcs = $(base_dir)/vsrc/DebugTransportModuleJtag.v \
$(base_dir)/vsrc/jtag_vpi.v \
$(base_dir)/vsrc/AsyncResetReg.v \
$(base_dir)/vsrc/AsyncSetReg.v \
sim_vsrcs = \
$(generated_dir)/$(long_name).v \