From 7c9a1b026554916dc42744524300312a8fd2dd3c Mon Sep 17 00:00:00 2001 From: Andrew Waterman Date: Tue, 2 Jan 2018 18:41:25 -0800 Subject: [PATCH] Correctly check for virtual-address canonicalization The previous check was necessary but not sufficient. --- src/main/scala/rocket/RocketCore.scala | 7 ++----- 1 file changed, 2 insertions(+), 5 deletions(-) diff --git a/src/main/scala/rocket/RocketCore.scala b/src/main/scala/rocket/RocketCore.scala index 2fa64461..efc86b9c 100644 --- a/src/main/scala/rocket/RocketCore.scala +++ b/src/main/scala/rocket/RocketCore.scala @@ -744,11 +744,8 @@ class Rocket(implicit p: Parameters) extends CoreModule()(p) def encodeVirtualAddress(a0: UInt, ea: UInt) = if (vaddrBitsExtended == vaddrBits) ea else { // efficient means to compress 64-bit VA into vaddrBits+1 bits // (VA is bad if VA(vaddrBits) != VA(vaddrBits-1)) - val a = a0 >> vaddrBits-1 - val e = ea(vaddrBits,vaddrBits-1).asSInt - val msb = - Mux(a === UInt(0) || a === UInt(1), e =/= SInt(0), - Mux(a.asSInt === SInt(-1) || a.asSInt === SInt(-2), e === SInt(-1), e(0))) + val a = a0.asSInt >> vaddrBits + val msb = Mux(a === 0.S || a === -1.S, ea(vaddrBits), !ea(vaddrBits-1)) Cat(msb, ea(vaddrBits-1,0)) }