diff --git a/src/main/scala/rocketchip/Top.scala b/src/main/scala/rocketchip/BaseTop.scala
similarity index 63%
rename from src/main/scala/rocketchip/Top.scala
rename to src/main/scala/rocketchip/BaseTop.scala
index f467eee2..58cec5b6 100644
--- a/src/main/scala/rocketchip/Top.scala
+++ b/src/main/scala/rocketchip/BaseTop.scala
@@ -81,30 +81,3 @@ class BaseTopModule[+L <: BaseTop, +B <: BaseTopBundle](val p: Parameters, l: L,
   println(p(ConfigString))
   ConfigStringOutput.contents = Some(p(ConfigString))
 }
-
-/** Example Top with Periphery */
-class ExampleTop(q: Parameters) extends BaseTop(q)
-    with PeripheryBootROM with PeripheryDebug with PeripheryExtInterrupts with PeripheryCoreplexLocalInterrupter
-    with PeripheryMasterMem with PeripheryMasterMMIO with PeripherySlave {
-  override lazy val module = Module(new ExampleTopModule(p, this, new ExampleTopBundle(p, _)))
-}
-
-class ExampleTopBundle(p: Parameters, c: Coreplex) extends BaseTopBundle(p, c)
-    with PeripheryBootROMBundle with PeripheryDebugBundle with PeripheryExtInterruptsBundle with PeripheryCoreplexLocalInterrupterBundle
-    with PeripheryMasterMemBundle with PeripheryMasterMMIOBundle with PeripherySlaveBundle
-
-class ExampleTopModule[+L <: ExampleTop, +B <: ExampleTopBundle](p: Parameters, l: L, b: Coreplex => B) extends BaseTopModule(p, l, b)
-    with PeripheryBootROMModule with PeripheryDebugModule with PeripheryExtInterruptsModule with PeripheryCoreplexLocalInterrupterModule
-    with PeripheryMasterMemModule with PeripheryMasterMMIOModule with PeripherySlaveModule
-
-/** Example Top with TestRAM */
-class ExampleTopWithTestRAM(q: Parameters) extends ExampleTop(q)
-    with PeripheryTestRAM {
-  override lazy val module = Module(new ExampleTopWithTestRAMModule(p, this, new ExampleTopWithTestRAMBundle(p, _)))
-}
-
-class ExampleTopWithTestRAMBundle(p: Parameters, c: Coreplex) extends ExampleTopBundle(p, c)
-    with PeripheryTestRAMBundle
-
-class ExampleTopWithTestRAMModule[+L <: ExampleTopWithTestRAM, +B <: ExampleTopWithTestRAMBundle](p: Parameters, l: L, b: Coreplex => B) extends ExampleTopModule(p, l, b)
-    with PeripheryTestRAMModule
diff --git a/src/main/scala/rocketchip/ExampleTop.scala b/src/main/scala/rocketchip/ExampleTop.scala
new file mode 100644
index 00000000..3895273d
--- /dev/null
+++ b/src/main/scala/rocketchip/ExampleTop.scala
@@ -0,0 +1,35 @@
+// See LICENSE for license details.
+
+package rocketchip
+
+import Chisel._
+import cde.{Parameters, Field}
+import coreplex.Coreplex
+import rocketchip._
+
+/** Example Top with Periphery */
+class ExampleTop(q: Parameters) extends BaseTop(q)
+    with PeripheryBootROM with PeripheryDebug with PeripheryExtInterrupts with PeripheryCoreplexLocalInterrupter
+    with PeripheryMasterMem with PeripheryMasterMMIO with PeripherySlave {
+  override lazy val module = Module(new ExampleTopModule(p, this, new ExampleTopBundle(p, _)))
+}
+
+class ExampleTopBundle(p: Parameters, c: Coreplex) extends BaseTopBundle(p, c)
+    with PeripheryBootROMBundle with PeripheryDebugBundle with PeripheryExtInterruptsBundle with PeripheryCoreplexLocalInterrupterBundle
+    with PeripheryMasterMemBundle with PeripheryMasterMMIOBundle with PeripherySlaveBundle
+
+class ExampleTopModule[+L <: ExampleTop, +B <: ExampleTopBundle](p: Parameters, l: L, b: Coreplex => B) extends BaseTopModule(p, l, b)
+    with PeripheryBootROMModule with PeripheryDebugModule with PeripheryExtInterruptsModule with PeripheryCoreplexLocalInterrupterModule
+    with PeripheryMasterMemModule with PeripheryMasterMMIOModule with PeripherySlaveModule
+
+/** Example Top with TestRAM */
+class ExampleTopWithTestRAM(q: Parameters) extends ExampleTop(q)
+    with PeripheryTestRAM {
+  override lazy val module = Module(new ExampleTopWithTestRAMModule(p, this, new ExampleTopWithTestRAMBundle(p, _)))
+}
+
+class ExampleTopWithTestRAMBundle(p: Parameters, c: Coreplex) extends ExampleTopBundle(p, c)
+    with PeripheryTestRAMBundle
+
+class ExampleTopWithTestRAMModule[+L <: ExampleTopWithTestRAM, +B <: ExampleTopWithTestRAMBundle](p: Parameters, l: L, b: Coreplex => B) extends ExampleTopModule(p, l, b)
+    with PeripheryTestRAMModule