riscv/rocket-chip
1
0
Fork 0
Code Releases Activity

tabs are evil

Browse Source
This commit is contained in:
Andrew Waterman 2016-03-10 14:17:41 -08:00
parent 3c9e63f5a5
commit 7a75a03123
1 changed files with 2 additions and 2 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
src/main/scala/Configs.scala
View File

@ -118,7 +118,7 @@ class DefaultConfig extends Config (
case RowBits => 4*site(CoreInstBits)
case NTLBEntries => 8
case CacheIdBits => 0
case SplitMetadata => false
case SplitMetadata => false
}:PF
case "L1D" => {
case NSets => Knob("L1D_SETS") //64
@ -126,7 +126,7 @@ class DefaultConfig extends Config (
case RowBits => 2*site(CoreDataBits)
case NTLBEntries => 8
case CacheIdBits => 0
case SplitMetadata => false
case SplitMetadata => false
}:PF
case ECCCode => None
case Replacer => () => new RandomReplacement(site(NWays))