From 76a1ae667ff9e5d5abc3b8eca9c698e6ef57be3a Mon Sep 17 00:00:00 2001
From: Megan Wachs <megan@sifive.com>
Date: Thu, 6 Jul 2017 17:57:08 -0700
Subject: [PATCH] PLIC: (undefZero=true) Don't allow addresses to alias

While the spec is unclear what happens when you access unused registers in the PLIC, for user simplicity turn off register aliasing. If this becomes a performance/area issue we can revisit.
---
 src/main/scala/uncore/devices/Plic.scala | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/main/scala/uncore/devices/Plic.scala b/src/main/scala/uncore/devices/Plic.scala
index 3629a216..9ecc8021 100644
--- a/src/main/scala/uncore/devices/Plic.scala
+++ b/src/main/scala/uncore/devices/Plic.scala
@@ -79,7 +79,7 @@ class TLPLIC(params: PLICParams)(implicit p: Parameters) extends LazyModule
     address   = Seq(params.address),
     device    = device,
     beatBytes = p(XLen)/8,
-    undefZero = false,
+    undefZero = true,
     concurrency = 1) // limiting concurrency handles RAW hazards on claim registers
 
   val intnode = IntNexusNode(