Update README.md (#748)
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Rocket Chip Generator [![Build Status](https://travis-ci.org/ucb-bar/rocket-chip.svg?branch=master)](https://travis-ci.org/ucb-bar/rocket-chip)
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Rocket Chip Generator :rocket: [![Build Status](https://travis-ci.org/freechipsproject/rocket-chip.svg?branch=master)](https://travis-ci.org/freechipsproject/rocket-chip)
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=====================
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This repository contains the Rocket chip generator necessary to instantiate
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* **groundtest**
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This RTL package generates synthesizeable hardware testers that emit randomized
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memory access streams in order to stress-tests the uncore memory hierarchy.
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* **junctions**
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This RTL package provides definitions for bus interfaces and generates a variety of protocol converters.
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* **jtag**
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This RTL package provides definitions for generating JTAG bus interfaces.
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* **regmapper**
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This utility package generates slave devices with a standardized interface for accessing their memory-mapped registers.
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* **rocket**
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