riscv/rocket-chip
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fix virtual address sign extension detection

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This commit is contained in:
Andrew Waterman 2012-11-20 04:06:57 -08:00
parent 30038bda8a
commit 72f94d1141
1 changed files with 1 additions and 1 deletions
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2
rocket/src/main/scala/dpath.scala
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@ -191,7 +191,7 @@ class Datapath(implicit conf: RocketConfiguration) extends Component
val e = ea(VADDR_BITS,VADDR_BITS-1) val e = ea(VADDR_BITS,VADDR_BITS-1)
Mux(a === UFix(0) || a === UFix(1), e != UFix(0), Mux(a === UFix(0) || a === UFix(1), e != UFix(0),
Mux(a === Fix(-1) || a === Fix(-2), e === Fix(-1), Mux(a === Fix(-1) || a === Fix(-2), e === Fix(-1),
Bool(false))) e(0)))
} }
val ex_effective_address = Cat(vaSign(ex_rs1, alu.io.adder_out), alu.io.adder_out(VADDR_BITS-1,0)).toUFix val ex_effective_address = Cat(vaSign(ex_rs1, alu.io.adder_out), alu.io.adder_out(VADDR_BITS-1,0)).toUFix