riscv/rocket-chip
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Make DefaultRV32Config be RV32IMAFCS, not RV32IMC

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The latter is more the domain of TinyConfig.
This commit is contained in:
Andrew Waterman 2016-09-07 01:58:25 -07:00
parent a7f47f3c23
commit 70cfd7ce13
2 changed files with 11 additions and 11 deletions
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4
src/main/scala/coreplex/Configs.scala
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@ -333,8 +333,6 @@ class WithNL2Ways(n: Int) extends Config(
class WithRV32 extends Config(
(pname,site,here) => pname match {
case XLen => 32
case UseVM => false
case UseUser => false
case FPUKey => Some(FPUConfig(divSqrt = false))
case RegressionTestNames => LinkedHashSet(
"rv32mi-p-ma_addr",
@ -359,6 +357,8 @@ class WithSmallCores extends Config (
topDefinitions = { (pname,site,here) => pname match {
case MulDivKey => Some(MulDivConfig())
case FPUKey => None
case UseVM => false
case UseUser => false
case NTLBEntries => 4
case BtbKey => BtbParameters(nEntries = 0)
case NAcquireTransactors => 2

2
src/main/scala/rocketchip/Configs.scala
View File

@ -219,7 +219,7 @@ class WithScratchpads extends Config(new WithNMemoryChannels(0) ++ new WithDataS
class DefaultFPGASmallConfig extends Config(new WithSmallCores ++ new DefaultFPGAConfig)
class DefaultSmallConfig extends Config(new WithSmallCores ++ new BaseConfig)
class DefaultRV32Config extends Config(new WithRV32 ++ new DefaultSmallConfig)
class DefaultRV32Config extends Config(new WithRV32 ++ new DefaultConfig)
class DualBankConfig extends Config(
new WithNBanksPerMemChannel(2) ++ new BaseConfig)