riscv/rocket-chip
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make sure pending bits updated for all releases

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This commit is contained in:
Howard Mao 2016-07-05 11:00:09 -07:00
parent 06ed9c5794
commit 702444709a
1 changed files with 1 additions and 1 deletions
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2
uncore/src/main/scala/agents/Trackers.scala
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@ -262,7 +262,7 @@ trait AcceptsVoluntaryReleases extends HasVoluntaryReleaseMetadataBuffer {
pending_irel_data := Mux(io.irel().hasMultibeatData(), pending_irel_data := Mux(io.irel().hasMultibeatData(),
dropPendingBitWhenBeatHasData(io.inner.release), dropPendingBitWhenBeatHasData(io.inner.release),
UInt(0)) UInt(0))
} .elsewhen (irel_same_xact) { } .otherwise {
pending_irel_data := (pending_irel_data & dropPendingBitWhenBeatHasData(io.inner.release)) pending_irel_data := (pending_irel_data & dropPendingBitWhenBeatHasData(io.inner.release))
} }
} }