riscv/rocket-chip
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DTS: collect common DTS nodes and move timebase-frequency to cores

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Putting the common DTS nodes into a shared object makes them get
emitted only one time. Plus it's better style.

timebase-frequency should really have been in the cpu nodes in the
first place according to the spec anyway. I was foolishly trying to
save bytes. However, now we really want it there in case it differs.
This commit is contained in:
Wesley W. Terpstra
2017-11-20 18:09:57 -08:00
parent 3b299397db
commit 6f3ff634f2
3 changed files with 49 additions and 36 deletions
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4
src/main/scala/tile/RocketTile.scala
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@@ -107,8 +107,8 @@ class RocketTile(val rocketParams: RocketTileParams)(implicit p: Parameters) ext
"compatible" -> Seq(ResourceString("sifive,rocket0"), ResourceString("riscv")),
"status" -> ofStr("okay"),
"clock-frequency" -> Seq(ResourceInt(rocketParams.core.bootFreqHz)),
"riscv,isa" -> ofStr(isa))
++ dcache ++ icache ++ nextlevel ++ mmu ++ itlb ++ dtlb ++ dtim ++ itim ++ incoherent)
"riscv,isa" -> ofStr(isa),
"timebase-frequency" -> Seq(ResourceInt(p(DTSTimebase)))) ++ dcache ++ icache ++ nextlevel ++ mmu ++ itlb ++ dtlb ++ dtim ++ itim ++ incoherent)
}
}
val intcDevice = new Device {