From 6e5a4c687f6c858ecb6498b662bc3e295daa7891 Mon Sep 17 00:00:00 2001 From: Henry Cook Date: Wed, 28 Jun 2017 21:48:10 -0700 Subject: [PATCH] diplomacy: a type of connect that always disables monitors (#828) --- src/main/scala/diplomacy/Nodes.scala | 16 ++++++++++------ src/main/scala/rocket/Frontend.scala | 3 ++- src/main/scala/rocketchip/Periphery.scala | 7 +++---- src/main/scala/uncore/tilelink2/Nodes.scala | 5 +++-- 4 files changed, 18 insertions(+), 13 deletions(-) diff --git a/src/main/scala/diplomacy/Nodes.scala b/src/main/scala/diplomacy/Nodes.scala index 92f00e1e..4f4f957e 100644 --- a/src/main/scala/diplomacy/Nodes.scala +++ b/src/main/scala/diplomacy/Nodes.scala @@ -18,7 +18,8 @@ trait InwardNodeImp[DI, UI, EI, BI <: Data] def bundleI(ei: EI): BI def colour: String def reverse: Boolean = false - def connect(edges: () => Seq[EI], bundles: () => Seq[(BI, BI)])(implicit p: Parameters, sourceInfo: SourceInfo): (Option[MonitorBase], () => Unit) = { + def connect(edges: () => Seq[EI], bundles: () => Seq[(BI, BI)], enableMonitoring: Boolean) + (implicit p: Parameters, sourceInfo: SourceInfo): (Option[MonitorBase], () => Unit) = { (None, () => bundles().foreach { case (i, o) => i <> o }) } @@ -229,7 +230,8 @@ abstract class MixedNode[DI, UI, EI, BI <: Data, DO, UO, EO, BO <: Data]( lazy val bundleIn = wireI(flipI(HeterogeneousBag(edgesIn .map(inner.bundleI(_))))) // connects the outward part of a node with the inward part of this node - private def bind(h: OutwardNodeHandle[DI, UI, BI], binding: NodeBinding)(implicit p: Parameters, sourceInfo: SourceInfo): Option[MonitorBase] = { + private def bind(h: OutwardNodeHandle[DI, UI, BI], binding: NodeBinding, enableMonitoring: Boolean) + (implicit p: Parameters, sourceInfo: SourceInfo): Option[MonitorBase] = { val x = this // x := y val y = h.outward val info = sourceLine(sourceInfo, " at ", "") @@ -255,14 +257,16 @@ abstract class MixedNode[DI, UI, EI, BI <: Data, DO, UO, EO, BO <: Data]( (x.bundleIn(iStart+j), y.bundleOut(oStart+j)) } } - val (out, newbinding) = inner.connect(edges _, bundles _) + val (out, newbinding) = inner.connect(edges _, bundles _, enableMonitoring) LazyModule.stack.head.bindings = newbinding :: LazyModule.stack.head.bindings out } - override def := (h: OutwardNodeHandle[DI, UI, BI])(implicit p: Parameters, sourceInfo: SourceInfo): Option[MonitorBase] = bind(h, BIND_ONCE) - override def :*= (h: OutwardNodeHandle[DI, UI, BI])(implicit p: Parameters, sourceInfo: SourceInfo): Option[MonitorBase] = bind(h, BIND_STAR) - override def :=* (h: OutwardNodeHandle[DI, UI, BI])(implicit p: Parameters, sourceInfo: SourceInfo): Option[MonitorBase] = bind(h, BIND_QUERY) + override def := (h: OutwardNodeHandle[DI, UI, BI])(implicit p: Parameters, sourceInfo: SourceInfo): Option[MonitorBase] = bind(h, BIND_ONCE, true) + override def :*= (h: OutwardNodeHandle[DI, UI, BI])(implicit p: Parameters, sourceInfo: SourceInfo): Option[MonitorBase] = bind(h, BIND_STAR, true) + override def :=* (h: OutwardNodeHandle[DI, UI, BI])(implicit p: Parameters, sourceInfo: SourceInfo): Option[MonitorBase] = bind(h, BIND_QUERY, true) + + def connectButDontMonitor(h: OutwardNodeHandle[DI, UI, BI])(implicit p: Parameters, sourceInfo: SourceInfo): Option[MonitorBase] = bind(h, BIND_ONCE, false) // meta-data for printing the node graph protected[diplomacy] def colour = inner.colour diff --git a/src/main/scala/rocket/Frontend.scala b/src/main/scala/rocket/Frontend.scala index 0faad869..baf45dc7 100644 --- a/src/main/scala/rocket/Frontend.scala +++ b/src/main/scala/rocket/Frontend.scala @@ -59,8 +59,9 @@ class Frontend(val icacheParams: ICacheParams, hartid: Int, owner: => Option[Dev val masterNode = TLOutputNode() val slaveNode = TLInputNode() - icache.slaveNode.map { _ := slaveNode } masterNode := icache.masterNode + // Avoid breaking tile dedup due to address constants in the monitor + icache.slaveNode.map { _ connectButDontMonitor slaveNode } } class FrontendBundle(outer: Frontend) extends CoreBundle()(outer.p) { diff --git a/src/main/scala/rocketchip/Periphery.scala b/src/main/scala/rocketchip/Periphery.scala index 85a34ac4..031bea83 100644 --- a/src/main/scala/rocketchip/Periphery.scala +++ b/src/main/scala/rocketchip/Periphery.scala @@ -347,10 +347,9 @@ trait HasPeripheryErrorSlave extends HasSystemNetworks { private val maxXfer = min(config.address.map(_.alignment).max.toInt, 4096) val error = LazyModule(new TLError(config.address, peripheryBusConfig.beatBytes)) - // Override the default Parameters to exclude the TLMonitor between the Fragmenter and error slave. - // Most slaves do not support a 4kB burst so this slave ends up with many more source bits than others. - private def sourceInfo(implicit x: chisel3.internal.sourceinfo.SourceInfo) = x - error.node.:=(TLFragmenter(peripheryBusConfig.beatBytes, maxXfer)(peripheryBus.node))(new WithoutTLMonitors ++ p, sourceInfo) + // Most slaves do not support a 4kB burst so this slave ends up with many more source bits than others; + // we exclude the onerously large TLMonitor that results. + error.node connectButDontMonitor TLFragmenter(peripheryBusConfig.beatBytes, maxXfer)(peripheryBus.node) } diff --git a/src/main/scala/uncore/tilelink2/Nodes.scala b/src/main/scala/uncore/tilelink2/Nodes.scala index afeece78..a2281da3 100644 --- a/src/main/scala/uncore/tilelink2/Nodes.scala +++ b/src/main/scala/uncore/tilelink2/Nodes.scala @@ -24,8 +24,9 @@ object TLImp extends NodeImp[TLClientPortParameters, TLManagerPortParameters, TL override def labelI(ei: TLEdgeIn) = (ei.manager.beatBytes * 8).toString override def labelO(eo: TLEdgeOut) = (eo.manager.beatBytes * 8).toString - override def connect(edges: () => Seq[TLEdgeIn], bundles: () => Seq[(TLBundle, TLBundle)])(implicit p: Parameters, sourceInfo: SourceInfo): (Option[TLMonitorBase], () => Unit) = { - val monitor = p(TLMonitorBuilder)(TLMonitorArgs(edges, sourceInfo, p)) + override def connect(edges: () => Seq[TLEdgeIn], bundles: () => Seq[(TLBundle, TLBundle)], enableMonitoring: Boolean) + (implicit p: Parameters, sourceInfo: SourceInfo): (Option[TLMonitorBase], () => Unit) = { + val monitor = if (enableMonitoring) p(TLMonitorBuilder)(TLMonitorArgs(edges, sourceInfo, p)) else None (monitor, () => { val eval = bundles () monitor.foreach { m => (eval zip m.module.io.in) foreach { case ((i,o), m) => m := TLBundleSnoop(o,i) } }