Trace generator: updates and additions to the scripts directory.
(1) Introduce tracegen.py, a script that invokes the emulator (built
with TraceGenConfig), sending a SIGTERM once all cores are finished.
(2) Update toaxe.py to gather some statistics about the trace.
(3) Introduce tracestats.py, which displays the stats in a useful way.
(4) Introduce tracegen+check.py, a top-level script that generates
traces, checks them, and emits stats. If this commit is pulled, it
should be done after pulling my latest groundtest commit.
This commit is contained in:
Matthew Naylor
Howard Mao
parent
c989ec5813
commit
6da45e7f26
@ -1 +1 @@
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Subproject commit 82a6f060db93d71ff6d2d44bde9ff8e4e1bf4bef
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Subproject commit e711f7988fe5be7881406eb310501cc0a7efb098
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299
scripts/toaxe.py
299
scripts/toaxe.py
@ -27,142 +27,177 @@
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import sys
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import sys
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import re
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import re
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import sets
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if len(sys.argv) != 2:
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def main():
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print "Usage: toaxe.py [FILE]"
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sys.exit()
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if sys.argv[1] == "-":
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if len(sys.argv) < 2:
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f = sys.stdin
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sys.stderr.write("Usage: toaxe.py TRACE-FILE [STATS-OUT-FILE]\n")
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else:
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sys.exit(-1)
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f = open(sys.argv[1], 'r')
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if f == None:
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print "File not found: ", sys.argv[1]
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sys.exit()
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lineCount = 0
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if sys.argv[1] == "-":
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def error(msg):
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f = sys.stdin
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print "Error at line ", lineCount, ": ", msg
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sys.exit()
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# Mapping from address to axe address
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addrMap = {}
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nextAddr = 0
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# Mapping from (thread id, tag id) to axe operation id
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tagMap = {}
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# Mapping from thread id to operation id
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fenceReq = {}
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# Mapping from thread id to operation id
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loadReserve = {}
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# Array of axe operations
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ops = []
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for line in f:
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# Exit loop at end of trace
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if line[0:9] == 'Completed': break
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# Parse thread id and command
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m = re.search(' *([0-9]+) *: *([^ ]*) (.*)', line)
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if m == None: error("Expected: <thread-id> ':' <command>")
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tid, cmd, line = m.group(1), m.group(2), m.group(3)
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if cmd == 'fence-req':
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# Parse time
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m = re.search(' *@ *([0-9]+)', line)
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if m == None: error ("expected timestamp")
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# Insert placeholder containing request time
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ops.append(str(m.group(1)))
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fenceReq[tid] = len(ops)-1
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elif cmd == 'fence-resp':
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# Insert 'sync' operation
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if not (tid in fenceReq) or fenceReq[tid] == None:
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error("fence-resp without fence-req on thread " + tid)
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startTime = ops[fenceReq[tid]]
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op = str(tid) + ": sync @ " + startTime
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# Add end-time
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m = re.search(' *@ *([0-9]+)', line)
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if m != None: op = op + ":" + str(m.group(1))
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ops[fenceReq[tid]] = (op,)
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fenceReq[tid] = None
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elif cmd == 'load-req' or cmd == 'load-reserve-req':
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# Parse address, tag, and time
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m = re.search(' *([0-9a-fx]+) *# *([0-9]+) *@ *([0-9]+)', line)
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if m == None: error("expected <address> #<tag> @<timestamp>")
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# Update address map
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if not (m.group(1) in addrMap):
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addrMap[m.group(1)] = nextAddr
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nextAddr = nextAddr+1
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# Insert place-holder
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ops.append((cmd, None, addrMap[m.group(1)], m.group(3), None))
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tagMap[(tid, m.group(2))] = len(ops)-1
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if cmd == 'load-reserve-req':
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loadReserve[tid] = len(ops)-1
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elif cmd == 'store-req' or cmd == 'store-cond-req' or cmd == 'swap-req':
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# Parse value, address, tag, and time
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m = re.search(' *([0-9]+) *([0-9a-fx]+) *# *([0-9]+) *@ *([0-9]+)', line)
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if m == None: error("expected <value> <address> #<tag> @<timestamp>")
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# Update address map
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if not (m.group(2) in addrMap):
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addrMap[m.group(2)] = nextAddr
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nextAddr = nextAddr+1
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# Insert place-holder
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lr = loadReserve[tid] if tid in loadReserve else None
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ops.append((cmd, m.group(1), addrMap[m.group(2)], m.group(4), lr))
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tagMap[(tid, m.group(3))] = len(ops)-1
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if cmd == 'store-cond-req': loadReserve[tid] = None
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elif cmd == 'resp':
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# Parse value and timestamp
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m = re.search(' *([0-9]+) *# *([0-9]+) *@ *([0-9]+)', line)
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if m == None: error("expected <value> #<tag> @<timestamp>")
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# Find corresponding response
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tag = m.group(2)
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if not ((tid, tag) in tagMap) or tagMap[(tid, tag)] == None:
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error("resp without associated req with tag " + tag + " on thread " + tid)
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opId = tagMap[(tid, tag)]
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(c, val, addr, start, lr) = ops[opId]
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if c == 'load-req':
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op = tid + ": M[" + str(addr) + '] == ' + m.group(1) + ' @ '
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op += start + ':' + m.group(3)
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ops[opId] = (op,)
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elif c == 'store-req':
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op = tid + ": M[" + str(addr) + '] := ' + val + ' @ '
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op += start + ':' # + m.group(3)
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ops[opId] = (op,)
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elif c == 'load-reserve-req':
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ops[opId] = (m.group(1), start, m.group(3))
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elif c == 'store-cond-req':
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if lr == None: error("store conditional without load-reserve")
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(loadVal, loadStart, loadFin) = ops[lr]
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if int(m.group(1)) != 0:
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# SC fail
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op = tid + ": M[" + str(addr) + "] == " + loadVal
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op += " @ " + loadStart + ":" + loadFin
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else:
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# SC success
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op = tid + ": { M[" + str(addr) + "] == " + loadVal + "; "
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op += "M[" + str(addr) + "] := " + val + "} @ "
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op += loadStart + ":" # + m.group(3)
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ops[lr] = (op,)
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ops[opId] = None
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elif c == 'swap-req':
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op = tid + ": { M[" + str(addr) + '] == ' + m.group(1)
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op += '; M[' + str(addr) + '] := ' + val
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op += '} @ ' + start + ':' # + m.group(3)
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ops[opId] = (op,)
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else:
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else:
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error("Unknown command '" + cmd + "'")
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f = open(sys.argv[1], 'r')
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if f == None:
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sys.stderr.write("File not found: " + sys.argv[1] + "\n")
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sys.exit(-1)
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statsFile = None
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if len(sys.argv) > 2:
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statsFile = open(sys.argv[2], 'a')
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lineCount = 0
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def error(msg):
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sys.stderr.write("Error at line " + str(lineCount) + ": " + msg + "\n")
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sys.exit(-1)
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# Mapping from address to axe address
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addrMap = {}
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nextAddr = 0
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# Mapping from (thread id, tag id) to axe operation id
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tagMap = {}
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# Mapping from thread id to operation id
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fenceReq = {}
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# Mapping from thread id to operation id
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loadReserve = {}
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# Array of axe operations
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ops = []
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# Statistics
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scCount = 0 # Number of store-conditionals
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scSuccessCount = 0 # Number of store-conditionals that succeeded
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loadCount = 0 # Number of loads
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loadExtCount = 0 # Number of loads of value written by another core
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# The previous write to each address by each thread
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prevWrite = {}
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for line in f:
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# Parse thread id and command
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m = re.search(' *([0-9]+) *: *([^ ]*) (.*)', line)
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if m == None: error("Expected: <thread-id> ':' <command>")
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tid, cmd, line = m.group(1), m.group(2), m.group(3)
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if cmd == 'fence-req':
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# Parse time
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m = re.search(' *@ *([0-9]+)', line)
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if m == None: error ("expected timestamp")
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# Insert placeholder containing request time
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ops.append(str(m.group(1)))
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fenceReq[tid] = len(ops)-1
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elif cmd == 'fence-resp':
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# Insert 'sync' operation
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if not (tid in fenceReq) or fenceReq[tid] == None:
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error("fence-resp without fence-req on thread " + tid)
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startTime = ops[fenceReq[tid]]
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op = str(tid) + ": sync @ " + startTime
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# Add end-time
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m = re.search(' *@ *([0-9]+)', line)
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if m != None: op = op + ":" + str(m.group(1))
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ops[fenceReq[tid]] = (op,)
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fenceReq[tid] = None
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elif cmd == 'load-req' or cmd == 'load-reserve-req':
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# Parse address, tag, and time
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m = re.search(' *([0-9a-fx]+) *# *([0-9]+) *@ *([0-9]+)', line)
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if m == None: error("expected <address> #<tag> @<timestamp>")
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# Update address map
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if not (m.group(1) in addrMap):
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addrMap[m.group(1)] = nextAddr
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nextAddr = nextAddr+1
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# Insert place-holder
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ops.append((cmd, None, addrMap[m.group(1)], m.group(3), None))
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tagMap[(tid, m.group(2))] = len(ops)-1
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if cmd == 'load-reserve-req':
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loadReserve[tid] = len(ops)-1
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elif cmd == 'store-req' or cmd == 'store-cond-req' or cmd == 'swap-req':
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# Parse value, address, tag, and time
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m = re.search(' *([0-9]+) *([0-9a-fx]+) *# *([0-9]+) *@ *([0-9]+)', line)
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if m == None: error("expected <value> <address> #<tag> @<timestamp>")
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# Update address map
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if not (m.group(2) in addrMap):
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addrMap[m.group(2)] = nextAddr
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nextAddr = nextAddr+1
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# Insert place-holder
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lr = loadReserve[tid] if tid in loadReserve else None
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ops.append((cmd, m.group(1), addrMap[m.group(2)], m.group(4), lr))
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tagMap[(tid, m.group(3))] = len(ops)-1
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if cmd == 'store-cond-req': loadReserve[tid] = None
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prevWrite[(tid, addrMap[m.group(2)])] = m.group(1)
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elif cmd == 'resp':
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# Parse value and timestamp
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m = re.search(' *([0-9]+) *# *([0-9]+) *@ *([0-9]+)', line)
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if m == None: error("expected <value> #<tag> @<timestamp>")
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# Find corresponding response
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tag = m.group(2)
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if not ((tid, tag) in tagMap) or tagMap[(tid, tag)] == None:
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error("resp without associated req with tag " + tag +
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" on thread " + tid)
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opId = tagMap[(tid, tag)]
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(c, val, addr, start, lr) = ops[opId]
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if c == 'load-req' or c == 'load-reserve-req':
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loadCount = loadCount+1
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if prevWrite.get((tid, addr), None) != m.group(1):
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loadExtCount = loadExtCount+1
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if c == 'load-req':
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op = tid + ": M[" + str(addr) + '] == ' + m.group(1) + ' @ '
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op += start + ':' + m.group(3)
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ops[opId] = (op,)
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elif c == 'store-req':
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op = tid + ": M[" + str(addr) + '] := ' + val + ' @ '
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op += start + ':' # + m.group(3)
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ops[opId] = (op,)
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elif c == 'load-reserve-req':
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ops[opId] = (m.group(1), start, m.group(3))
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elif c == 'store-cond-req':
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if lr == None: error("store conditional without load-reserve")
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(loadVal, loadStart, loadFin) = ops[lr]
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scCount = scCount + 1
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if int(m.group(1)) != 0:
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# SC fail
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op = tid + ": M[" + str(addr) + "] == " + loadVal
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op += " @ " + loadStart + ":" + loadFin
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else:
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# SC success
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scSuccessCount = scSuccessCount + 1
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op = tid + ": { M[" + str(addr) + "] == " + loadVal + "; "
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op += "M[" + str(addr) + "] := " + val + "} @ "
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op += loadStart + ":" + loadFin
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ops[lr] = (op,)
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ops[opId] = None
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elif c == 'swap-req':
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op = tid + ": { M[" + str(addr) + '] == ' + m.group(1)
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op += '; M[' + str(addr) + '] := ' + val
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op += '} @ ' + start + ':' # + m.group(3)
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ops[opId] = (op,)
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else:
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error("Unknown command '" + cmd + "'")
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lineCount = lineCount+1
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lineCount = lineCount+1
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# Print address map in comments
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# Print statistics
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for addr in addrMap:
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scSuccessRate = str(scSuccessCount/float(scCount))[0:6]
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print ("# &M[" + str(addrMap[addr]) + "] == " + addr)
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loadExtRate = str(loadExtCount/float(loadCount))[0:6]
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print("# LRSC_Success_Rate=" + scSuccessRate)
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if statsFile != None:
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statsFile.write("LRSC_Success_Rate=" + scSuccessRate + "\n")
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statsFile.write("Load_External_Rate=" + loadExtRate + "\n")
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statsFile.close()
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# Print axe trace
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# Print address map in comments
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for op in ops:
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for addr in addrMap:
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if op != None and isinstance(op, tuple) and len(op) == 1:
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print ("# &M[" + str(addrMap[addr]) + "] == " + addr)
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print op[0]
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# Print axe trace
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for op in ops:
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if op != None and isinstance(op, tuple) and len(op) == 1:
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print op[0]
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try:
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main()
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except KeyboardInterrupt:
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sys.exit(-1)
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148
scripts/tracegen+check.sh
Executable file
148
scripts/tracegen+check.sh
Executable file
@ -0,0 +1,148 @@
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#!/bin/bash
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# This file was originally written by Matthew Naylor, University of
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# Cambridge.
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#
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# This software was partly developed by the University of Cambridge
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# Computer Laboratory under DARPA/AFRL contract FA8750-10-C-0237
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# ("CTSRD"), as part of the DARPA CRASH research programme.
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#
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# This software was partly developed by the University of Cambridge
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# Computer Laboratory under DARPA/AFRL contract FA8750-11-C-0249
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# ("MRC2"), as part of the DARPA MRC research programme.
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#
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# This software was partly developed by the University of Cambridge
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# Computer Laboratory as part of the Rigorous Engineering of
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# Mainstream Systems (REMS) project, funded by EPSRC grant
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# EP/K008528/1.
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# This script can be used to test the memory consistency of rocket
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# chip in simulation when compiled with the 'TraceGenConfig'
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# configuation.
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###############################################################################
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# Parameters
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# ==========
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# Arguments are taken from environment variables where available.
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# Elsewhere, defaults values are chosen.
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||||||
|
START_SEED=${START_SEED-0}
|
||||||
|
NUM_TESTS=${NUM_TESTS-100}
|
||||||
|
EMU=${EMU-emulator-Top-TraceGenConfig}
|
||||||
|
TRACE_GEN=${TRACE_GEN-tracegen.py}
|
||||||
|
TO_AXE=${TO_AXE-toaxe.py}
|
||||||
|
AXE=${AXE-axe}
|
||||||
|
MODEL=${MODEL-WMO}
|
||||||
|
LOG_DIR=${LOG_DIR-tracegen-log}
|
||||||
|
TRACE_STATS=${TRACE_STATS-tracestats.py}
|
||||||
|
|
||||||
|
###############################################################################
|
||||||
|
|
||||||
|
# Inferred parameters
|
||||||
|
# ===================
|
||||||
|
|
||||||
|
END_SEED=`expr \( $START_SEED + $NUM_TESTS \) - 1`
|
||||||
|
LOG=$LOG_DIR
|
||||||
|
PATH=$PATH:.
|
||||||
|
|
||||||
|
# Sanity check
|
||||||
|
# ============
|
||||||
|
|
||||||
|
if [ ! `command -v $EMU` ]; then
|
||||||
|
echo Can\'t find emulator: \'$EMU\'
|
||||||
|
exit -1
|
||||||
|
fi
|
||||||
|
|
||||||
|
if [ ! `command -v $TO_AXE` ]; then
|
||||||
|
echo Please add \'toaxe.py\' to your PATH
|
||||||
|
exit -1
|
||||||
|
fi
|
||||||
|
|
||||||
|
if [ ! `command -v $TRACE_GEN` ]; then
|
||||||
|
echo Please add \'tracegen.py\' to your PATH
|
||||||
|
exit -1
|
||||||
|
fi
|
||||||
|
|
||||||
|
if [ ! `command -v $AXE` ]; then
|
||||||
|
echo Please add \'axe\' to your PATH
|
||||||
|
exit -1
|
||||||
|
fi
|
||||||
|
|
||||||
|
if [ ! `command -v $TRACE_STATS` ]; then
|
||||||
|
echo Please add \'tracestats.py\' to your PATH
|
||||||
|
exit -1
|
||||||
|
fi
|
||||||
|
|
||||||
|
if [ "$MODEL" != SC -a \
|
||||||
|
"$MODEL" != TSO -a \
|
||||||
|
"$MODEL" != PSO -a \
|
||||||
|
"$MODEL" != WMO -a \
|
||||||
|
"$MODEL" != POW ]; then
|
||||||
|
echo Unknown consistency model \'$MODEL\'
|
||||||
|
exit -1
|
||||||
|
fi
|
||||||
|
|
||||||
|
# Setup log directory
|
||||||
|
# ===================
|
||||||
|
|
||||||
|
if [ ! -d $LOG ]; then
|
||||||
|
echo Creating log directory: $LOG
|
||||||
|
mkdir $LOG
|
||||||
|
fi
|
||||||
|
|
||||||
|
rm -f $LOG/errors.txt
|
||||||
|
rm -f $LOG/stats.txt
|
||||||
|
|
||||||
|
# Test loop
|
||||||
|
# =========
|
||||||
|
|
||||||
|
echo Testing against $MODEL model:
|
||||||
|
|
||||||
|
for (( I = $START_SEED; I <= $END_SEED; I++ )); do
|
||||||
|
SPACE=`expr $I \% 10`
|
||||||
|
if [ $SPACE -eq 0 ]; then
|
||||||
|
echo -n " "
|
||||||
|
fi
|
||||||
|
|
||||||
|
NEWLINE=`expr $I \% 50`
|
||||||
|
if [ $NEWLINE -eq 0 ]; then
|
||||||
|
printf "\n%8i: " $I
|
||||||
|
fi
|
||||||
|
|
||||||
|
# Generate trace
|
||||||
|
$TRACE_GEN $EMU $I > $LOG/trace.txt
|
||||||
|
if [ ! $? -eq 0 ]; then
|
||||||
|
echo -e "\n\nError: emulator returned non-zero exit code"
|
||||||
|
echo See $LOG/trace.txt for details
|
||||||
|
exit -1
|
||||||
|
fi
|
||||||
|
|
||||||
|
# Convert to axe format
|
||||||
|
$TO_AXE $LOG/trace.txt $LOG/stats.txt 2>> $LOG/errors.txt > $LOG/trace.axe
|
||||||
|
if [ ! $? -eq 0 ]; then
|
||||||
|
echo -e "\n\nError during trace generation with seed $I"
|
||||||
|
echo "See $LOG/errors.txt"
|
||||||
|
exit -1
|
||||||
|
else
|
||||||
|
# Check trace
|
||||||
|
OUTCOME=`$AXE check $MODEL $LOG/trace.axe 2>> $LOG/errors.txt`
|
||||||
|
if [ "$OUTCOME" == "OK" ]; then
|
||||||
|
echo -n .
|
||||||
|
else
|
||||||
|
if [ "$OUTCOME" == "NO" ]; then
|
||||||
|
echo -e "\n\nFailed $MODEL with seed $I"
|
||||||
|
echo "See $LOG/trace.txt and $LOG/trace.axe for counterexample"
|
||||||
|
exit -1
|
||||||
|
else
|
||||||
|
echo -e "\n\nError during trace generation with seed $I"
|
||||||
|
echo "See $LOG/errors.txt for details"
|
||||||
|
exit -1
|
||||||
|
fi
|
||||||
|
fi
|
||||||
|
fi
|
||||||
|
done
|
||||||
|
|
||||||
|
echo -e "\n\nOK, passed $NUM_TESTS tests"
|
||||||
|
$TRACE_STATS $LOG/stats.txt
|
||||||
62
scripts/tracegen.py
Executable file
62
scripts/tracegen.py
Executable file
@ -0,0 +1,62 @@
|
|||||||
|
#!/usr/bin/env python
|
||||||
|
|
||||||
|
# This file was originally written by Matthew Naylor, University of
|
||||||
|
# Cambridge.
|
||||||
|
#
|
||||||
|
# This software was partly developed by the University of Cambridge
|
||||||
|
# Computer Laboratory under DARPA/AFRL contract FA8750-10-C-0237
|
||||||
|
# ("CTSRD"), as part of the DARPA CRASH research programme.
|
||||||
|
#
|
||||||
|
# This software was partly developed by the University of Cambridge
|
||||||
|
# Computer Laboratory under DARPA/AFRL contract FA8750-11-C-0249
|
||||||
|
# ("MRC2"), as part of the DARPA MRC research programme.
|
||||||
|
#
|
||||||
|
# This software was partly developed by the University of Cambridge
|
||||||
|
# Computer Laboratory as part of the Rigorous Engineering of
|
||||||
|
# Mainstream Systems (REMS) project, funded by EPSRC grant
|
||||||
|
# EP/K008528/1.
|
||||||
|
|
||||||
|
# -------
|
||||||
|
# Outline
|
||||||
|
# -------
|
||||||
|
|
||||||
|
# Usage:
|
||||||
|
#
|
||||||
|
# tracegen.py EMULATOR SEED
|
||||||
|
#
|
||||||
|
# This script generates a trace using the given emulator (built
|
||||||
|
# with CONFIG=TraceGenConfig). It waits until all cores have
|
||||||
|
# completed trace generation before terminating the emulator.
|
||||||
|
|
||||||
|
import sys
|
||||||
|
import subprocess
|
||||||
|
import re
|
||||||
|
|
||||||
|
def main():
|
||||||
|
if len(sys.argv) != 3:
|
||||||
|
sys.stderr.write("Usage: tracegen.py EMULATOR SEED\n")
|
||||||
|
sys.exit(-1)
|
||||||
|
|
||||||
|
p = subprocess.Popen([sys.argv[1], "+verbose", "-s" + sys.argv[2]],
|
||||||
|
stderr=subprocess.PIPE, stdout=subprocess.PIPE)
|
||||||
|
if p == None:
|
||||||
|
sys.stderr.write("File not found: " + sys.argv[1] + "\n")
|
||||||
|
sys.exit(-1)
|
||||||
|
|
||||||
|
numFinished = 0
|
||||||
|
while True:
|
||||||
|
line = p.stderr.readline()
|
||||||
|
if line[0:9] == "FINISHED ":
|
||||||
|
total = int(line[9:-1])
|
||||||
|
numFinished = numFinished + 1
|
||||||
|
if numFinished == total:
|
||||||
|
break
|
||||||
|
else:
|
||||||
|
print line,
|
||||||
|
|
||||||
|
p.terminate()
|
||||||
|
|
||||||
|
try:
|
||||||
|
main()
|
||||||
|
except KeyboardInterrupt:
|
||||||
|
sys.exit(-1)
|
||||||
76
scripts/tracestats.py
Executable file
76
scripts/tracestats.py
Executable file
@ -0,0 +1,76 @@
|
|||||||
|
#!/usr/bin/env python
|
||||||
|
|
||||||
|
# This file was originally written by Matthew Naylor, University of
|
||||||
|
# Cambridge.
|
||||||
|
#
|
||||||
|
# This software was partly developed by the University of Cambridge
|
||||||
|
# Computer Laboratory under DARPA/AFRL contract FA8750-10-C-0237
|
||||||
|
# ("CTSRD"), as part of the DARPA CRASH research programme.
|
||||||
|
#
|
||||||
|
# This software was partly developed by the University of Cambridge
|
||||||
|
# Computer Laboratory under DARPA/AFRL contract FA8750-11-C-0249
|
||||||
|
# ("MRC2"), as part of the DARPA MRC research programme.
|
||||||
|
#
|
||||||
|
# This software was partly developed by the University of Cambridge
|
||||||
|
# Computer Laboratory as part of the Rigorous Engineering of
|
||||||
|
# Mainstream Systems (REMS) project, funded by EPSRC grant
|
||||||
|
# EP/K008528/1.
|
||||||
|
|
||||||
|
# -------
|
||||||
|
# Outline
|
||||||
|
# -------
|
||||||
|
|
||||||
|
# Usage:
|
||||||
|
#
|
||||||
|
# tracegen-stats.py STATS-FILE
|
||||||
|
#
|
||||||
|
# This script produces some statistics about the traces generated
|
||||||
|
# using tracegen.py.
|
||||||
|
|
||||||
|
import sys
|
||||||
|
import subprocess
|
||||||
|
import re
|
||||||
|
|
||||||
|
def main():
|
||||||
|
if len(sys.argv) != 2:
|
||||||
|
sys.stderr.write("Usage: tracegen-stats.py STATS-FILE\n")
|
||||||
|
sys.exit(-1)
|
||||||
|
|
||||||
|
f = open(sys.argv[1], 'r')
|
||||||
|
if f == None:
|
||||||
|
sys.stderr.write("File not found: " + sys.argv[1] + "\n")
|
||||||
|
sys.exit(-1)
|
||||||
|
|
||||||
|
lrscSuccessSum = 0.0
|
||||||
|
lrscSuccessCount = 0
|
||||||
|
loadExtRateSum = 0.0
|
||||||
|
loadExtRateCount = 0
|
||||||
|
for line in f:
|
||||||
|
if line[0:18] == "LRSC_Success_Rate=":
|
||||||
|
val = float(line[18:-1])
|
||||||
|
lrscSuccessSum = lrscSuccessSum + val
|
||||||
|
lrscSuccessCount = lrscSuccessCount + 1
|
||||||
|
|
||||||
|
if line[0:19] == "Load_External_Rate=":
|
||||||
|
val = float(line[19:-1])
|
||||||
|
loadExtRateSum = loadExtRateSum + val
|
||||||
|
loadExtRateCount = loadExtRateCount + 1
|
||||||
|
|
||||||
|
if lrscSuccessCount > 0:
|
||||||
|
lrscSuccessAvg = lrscSuccessSum / float(lrscSuccessCount)
|
||||||
|
lrscSuccessRate = str(int(100.0*lrscSuccessAvg)) + "%"
|
||||||
|
print "LR/SC success rate:", lrscSuccessRate
|
||||||
|
else:
|
||||||
|
print "LR/SC success rate: none performed"
|
||||||
|
|
||||||
|
if loadExtRateCount > 0:
|
||||||
|
loadExtRateAvg = loadExtRateSum / float(loadExtRateCount)
|
||||||
|
loadExtRate = str(int(100.0*loadExtRateAvg)) + "%"
|
||||||
|
print "Load-external rate:", loadExtRate
|
||||||
|
else:
|
||||||
|
print "Load-external rate: none performed"
|
||||||
|
|
||||||
|
try:
|
||||||
|
main()
|
||||||
|
except KeyboardInterrupt:
|
||||||
|
sys.exit(-1)
|
||||||
Loading…
Reference in New Issue
Block a user