riscv/rocket-chip
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minor cache param cleanup

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This commit is contained in:
Henry Cook 2014-08-14 11:31:42 -07:00
parent 2de268b3b1
commit 6a4193cf90
2 changed files with 3 additions and 3 deletions
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1
rocket/src/main/scala/icache.scala
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@ -5,7 +5,6 @@ import uncore._
import Util._ import Util._
case object InstBytes extends Field[Int] case object InstBytes extends Field[Int]
case object CoreBTBParams extends Field[PF]
abstract trait FrontendParameters extends CacheParameters { abstract trait FrontendParameters extends CacheParameters {
val instBytes = params(InstBytes) val instBytes = params(InstBytes)

5
rocket/src/main/scala/nbdcache.scala
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@ -7,11 +7,12 @@ import Util._
case object StoreDataQueueDepth extends Field[Int] case object StoreDataQueueDepth extends Field[Int]
case object ReplayQueueDepth extends Field[Int] case object ReplayQueueDepth extends Field[Int]
case object NMSHRs extends Field[Int] case object NMSHRs extends Field[Int]
case object NTLBEntries extends Field[Int]
case object CoreReqTagBits extends Field[Int] case object CoreReqTagBits extends Field[Int]
case object CoreDataBits extends Field[Int] case object CoreDataBits extends Field[Int]
case object ECCCode extends Field[Code]
case object LRSCCycles extends Field[Int] case object LRSCCycles extends Field[Int]
//TODO PARAMS Also used by icache: is this ok?:
case object NTLBEntries extends Field[Int]
case object ECCCode extends Field[Code]
abstract trait L1HellaCacheParameters extends CacheParameters { abstract trait L1HellaCacheParameters extends CacheParameters {
val indexmsb = untagBits-1 val indexmsb = untagBits-1