riscv/rocket-chip
1
0
Fork 0
Code Releases Activity

AddressDecoder: support AddressSets with infinite bits (#547)

Browse Source
This commit is contained in:
Wesley W. Terpstra 2017-02-04 15:59:50 -08:00 committed by GitHub
parent 71f2445c62
commit 69f4c1a144
1 changed files with 2 additions and 2 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
src/main/scala/diplomacy/AddressDecoder.scala
View File

@ -29,8 +29,8 @@ object AddressDecoder
} } } }
} }
val maxBits = log2Ceil(ports.map(_.map(_.max).max).max + 1) val maxBits = log2Ceil(ports.map(_.map(_.base).max).max)
val (bitsToTry, bitsToTake) = (0 until maxBits).map(BigInt(1) << _).partition(b => (givenBits & b) == 0) val (bitsToTry, bitsToTake) = (0 to maxBits).map(BigInt(1) << _).partition(b => (givenBits & b) == 0)
val partitions = Seq(ports.map(_.sorted).sorted(portOrder)) val partitions = Seq(ports.map(_.sorted).sorted(portOrder))
val givenPartitions = bitsToTake.foldLeft(partitions) { (p, b) => partitionPartitions(p, b) } val givenPartitions = bitsToTake.foldLeft(partitions) { (p, b) => partitionPartitions(p, b) }
val selected = recurse(givenPartitions, bitsToTry.toSeq) val selected = recurse(givenPartitions, bitsToTry.toSeq)