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[tilelink2] Add unit tests for many TL2 components

These tests mostly use the Fuzzer and RAMModel to check that adapters
correctly handle randomly generated legal traffic.
This commit is contained in:
Henry Cook
2016-09-28 15:11:05 -07:00
committed by Henry Cook
parent 81123f84c9
commit 69e121260e
11 changed files with 282 additions and 3 deletions

View File

@ -250,3 +250,24 @@ object TLFragmenter
fragmenter.node
}
}
/** Synthesizeable unit tests */
import unittest._
class TLRAMFragmenter(ramBeatBytes: Int, maxSize: Int) extends LazyModule {
val fuzz = LazyModule(new TLFuzzer(5000))
val model = LazyModule(new TLRAMModel)
val ram = LazyModule(new TLRAM(AddressSet(0x0, 0x3ff), beatBytes = ramBeatBytes))
model.node := fuzz.node
ram.node := TLFragmenter(ramBeatBytes, maxSize)(model.node)
lazy val module = new LazyModuleImp(this) with HasUnitTestIO {
io.finished := fuzz.module.io.finished
}
}
class TLRAMFragmenterTest(ramBeatBytes: Int, maxSize: Int) extends UnitTest(timeout = 500000) {
io.finished := Module(LazyModule(new TLRAMFragmenter(ramBeatBytes,maxSize)).module).io.finished
}