improved instruction decoding
it now makes use of don't-cares by performing logic minimization
This commit is contained in:
parent
4cfa6cd9a8
commit
65ff397122
@ -12,6 +12,7 @@ object Constants
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val MEM_BACKUP_WIDTH = 16
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val MEM_BACKUP_WIDTH = 16
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val BR_X = Bits("b????", 4)
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val BR_N = UFix(0, 4);
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val BR_N = UFix(0, 4);
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val BR_EQ = UFix(1, 4);
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val BR_EQ = UFix(1, 4);
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val BR_NE = UFix(2, 4);
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val BR_NE = UFix(2, 4);
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@ -31,10 +32,7 @@ object Constants
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val PC_EVEC = UFix(6, 3);
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val PC_EVEC = UFix(6, 3);
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val PC_JR = UFix(7, 3);
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val PC_JR = UFix(7, 3);
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val REN_Y = UFix(1, 1);
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val A2_X = Bits("b???", 3)
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val REN_N = UFix(0, 1);
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val A2_X = UFix(0, 3);
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val A2_BTYPE = UFix(0, 3);
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val A2_BTYPE = UFix(0, 3);
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val A2_LTYPE = UFix(1, 3);
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val A2_LTYPE = UFix(1, 3);
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val A2_ITYPE = UFix(2, 3);
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val A2_ITYPE = UFix(2, 3);
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@ -42,38 +40,33 @@ object Constants
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val A2_JTYPE = UFix(5, 3);
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val A2_JTYPE = UFix(5, 3);
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val A2_RTYPE = UFix(6, 3);
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val A2_RTYPE = UFix(6, 3);
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val MUL_X = UFix(0, 2);
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val MUL_X = Bits("b??", 2)
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val MUL_LO = UFix(0, 2);
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val MUL_LO = UFix(0, 2);
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val MUL_H = UFix(1, 2);
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val MUL_H = UFix(1, 2);
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val MUL_HSU = UFix(2, 2);
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val MUL_HSU = UFix(2, 2);
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val MUL_HU = UFix(3, 2);
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val MUL_HU = UFix(3, 2);
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val DIV_X = UFix(0, 2);
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val DIV_X = Bits("b??", 2)
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val DIV_D = UFix(0, 2);
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val DIV_D = UFix(0, 2);
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val DIV_DU = UFix(1, 2);
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val DIV_DU = UFix(1, 2);
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val DIV_R = UFix(2, 2);
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val DIV_R = UFix(2, 2);
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val DIV_RU = UFix(3, 2);
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val DIV_RU = UFix(3, 2);
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val M_N = UFix(0, 1);
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val X = Bits("b?", 1)
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val M_Y = UFix(1, 1);
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val N = UFix(0, 1);
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val Y = UFix(1, 1);
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val WEN_N = UFix(0, 1);
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val WA_X = X
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val WEN_Y = UFix(1, 1);
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val WA_RD = N
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val WA_RA = Y
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val WA_X = UFix(0, 1);
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val WB_X = Bits("b???", 3)
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val WA_RD = UFix(0, 1);
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val WA_RA = UFix(1, 1);
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val WB_X = UFix(0, 3);
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val WB_PC = UFix(0, 3);
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val WB_PC = UFix(0, 3);
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val WB_ALU = UFix(2, 3);
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val WB_ALU = UFix(2, 3);
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val WB_TSC = UFix(4, 3);
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val WB_TSC = UFix(4, 3);
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val WB_IRT = UFix(5, 3);
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val WB_IRT = UFix(5, 3);
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val N = UFix(0, 1);
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val FN_X = Bits("b????", 4)
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val Y = UFix(1, 1);
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val FN_X = UFix(0, 4);
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val FN_ADD = UFix(0, 4);
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val FN_ADD = UFix(0, 4);
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val FN_SUB = UFix(1, 4);
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val FN_SUB = UFix(1, 4);
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val FN_SLT = UFix(2, 4);
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val FN_SLT = UFix(2, 4);
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@ -86,14 +79,14 @@ object Constants
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val FN_SRA = UFix(9, 4);
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val FN_SRA = UFix(9, 4);
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val FN_OP2 = UFix(10, 4);
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val FN_OP2 = UFix(10, 4);
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val DW_X = UFix(0, 1);
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val DW_X = X
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val DW_32 = UFix(0, 1);
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val DW_32 = N
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val DW_64 = UFix(1, 1);
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val DW_64 = Y
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val DW_XPR = UFix(1, 1);
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val DW_XPR = Y
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val RA = UFix(1, 5);
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val RA = UFix(1, 5);
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val MT_X = Bits("b000", 3);
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val MT_X = Bits("b???", 3);
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val MT_B = Bits("b000", 3);
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val MT_B = Bits("b000", 3);
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val MT_H = Bits("b001", 3);
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val MT_H = Bits("b001", 3);
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val MT_W = Bits("b010", 3);
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val MT_W = Bits("b010", 3);
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@ -102,7 +95,7 @@ object Constants
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val MT_HU = Bits("b101", 3);
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val MT_HU = Bits("b101", 3);
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val MT_WU = Bits("b110", 3);
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val MT_WU = Bits("b110", 3);
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val M_X = UFix(0, 4);
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val M_X = Bits("b????", 4);
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val M_XRD = Bits("b0000", 4); // int load
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val M_XRD = Bits("b0000", 4); // int load
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val M_XWR = Bits("b0001", 4); // int store
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val M_XWR = Bits("b0001", 4); // int store
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val M_PFR = Bits("b0010", 4); // prefetch with intent to read
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val M_PFR = Bits("b0010", 4); // prefetch with intent to read
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@ -120,12 +113,14 @@ object Constants
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val M_XA_MINU = Bits("b1110", 4);
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val M_XA_MINU = Bits("b1110", 4);
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val M_XA_MAXU = Bits("b1111", 4);
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val M_XA_MAXU = Bits("b1111", 4);
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val PCR_X = Bits("b???", 3)
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val PCR_N = Bits(0,3)
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val PCR_N = Bits(0,3)
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val PCR_F = Bits(1,3) // mfpcr
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val PCR_F = Bits(1,3) // mfpcr
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val PCR_T = Bits(4,3) // mtpcr
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val PCR_T = Bits(4,3) // mtpcr
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val PCR_C = Bits(6,3) // clearpcr
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val PCR_C = Bits(6,3) // clearpcr
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val PCR_S = Bits(7,3) // setpcr
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val PCR_S = Bits(7,3) // setpcr
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val SYNC_X = Bits("b??", 2)
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val SYNC_N = Bits(0,2);
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val SYNC_N = Bits(0,2);
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val SYNC_D = Bits(1,2);
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val SYNC_D = Bits(1,2);
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val SYNC_I = Bits(2,2);
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val SYNC_I = Bits(2,2);
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@ -223,7 +218,7 @@ object Constants
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val VEC_N = UFix(0, 1);
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val VEC_N = UFix(0, 1);
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val VEC_Y = if (HAVE_VEC) UFix(1, 1) else VEC_N;
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val VEC_Y = if (HAVE_VEC) UFix(1, 1) else VEC_N;
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val VEC_X = UFix(0, 2)
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val VEC_X = Bits("b??", 2).toUFix
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val VEC_FN_N = UFix(0, 2)
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val VEC_FN_N = UFix(0, 2)
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val VEC_VL = UFix(1, 2)
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val VEC_VL = UFix(1, 2)
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val VEC_CFG = UFix(2, 2)
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val VEC_CFG = UFix(2, 2)
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@ -130,11 +130,6 @@ class rocketProc(resetSignal: Bool = null) extends Component(resetSignal)
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dpath.io.fpu <> fpu.io.dpath
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dpath.io.fpu <> fpu.io.dpath
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ctrl.io.fpu <> fpu.io.ctrl
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ctrl.io.fpu <> fpu.io.ctrl
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}
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}
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else
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{
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ctrl.io.fpu.dec.valid := Bool(false)
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ctrl.io.fpu.dec.wen := Bool(false)
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}
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if (HAVE_VEC)
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if (HAVE_VEC)
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{
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{
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@ -95,212 +95,238 @@ object rocketCtrlDecode
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val decode_default =
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val decode_default =
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// eret
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// eret
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// | syscall
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// fp_val renx2 | syscall
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// vec_val mem_val mul_val div_val pcr | | privileged
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// | vec_val | renx1 mem_val mul_val div_val wen pcr | | privileged
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// val | brtype renx2 renx1 s_alu2 dw alu | mem_cmd mem_type| mul_fn | div_fn wen s_wa s_wb | sync | | | replay_next
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// val | | brtype | | s_alu2 dw alu | mem_cmd mem_type| mul_fn | div_fn | s_wa s_wb | sync | | | replay_next
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// | | | | | | | | | | | | | | | | | | | | | | | |
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// | | | | | | | | | | | | | | | | | | | | | | | | |
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List(N, N,BR_N, REN_N,REN_N,A2_X, DW_X, FN_X, M_N,M_X, MT_X, N,MUL_X, N,DIV_X, WEN_N,WA_X, WB_X, PCR_N,SYNC_N,N,N,N,N)
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List(N, X,X,BR_X, X,X,A2_X, DW_X, FN_X, N,M_X, MT_X, X,MUL_X, X,DIV_X, X,WA_X, WB_X, PCR_X,SYNC_X,X,X,X,X)
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val xdecode = Array(
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val xdecode = Array(
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// eret
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// eret
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// | syscall
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// fp_val renx2 | syscall
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// vec_val mem_val mul_val div_val pcr | | privileged
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// | vec_val | renx1 mem_val mul_val div_val wen pcr | | privileged
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// val | brtype renx2 renx1 s_alu2 dw alu | mem_cmd mem_type| mul_fn | div_fn wen s_wa s_wb | wsync | | | replay_next
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// val | | brtype | | s_alu2 dw alu | mem_cmd mem_type| mul_fn | div_fn | s_wa s_wb | sync | | | replay_next
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// | | | | | | | | | | | | | | | | | | | | | | | |
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// | | | | | | | | | | | | | | | | | | | | | | | | |
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BNE-> List(Y, N,BR_NE, REN_Y,REN_Y,A2_BTYPE,DW_X, FN_ADD, M_N,M_X, MT_X, N,MUL_X, N,DIV_X, WEN_N,WA_X, WB_X, PCR_N,SYNC_N,N,N,N,N),
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BNE-> List(Y, N,N,BR_NE, Y,Y,A2_BTYPE,DW_X, FN_ADD, N,M_X, MT_X, N,MUL_X, N,DIV_X, N,WA_X, WB_X, PCR_N,SYNC_N,N,N,N,N),
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BEQ-> List(Y, N,BR_EQ, REN_Y,REN_Y,A2_BTYPE,DW_X, FN_ADD, M_N,M_X, MT_X, N,MUL_X, N,DIV_X, WEN_N,WA_X, WB_X, PCR_N,SYNC_N,N,N,N,N),
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BEQ-> List(Y, N,N,BR_EQ, Y,Y,A2_BTYPE,DW_X, FN_ADD, N,M_X, MT_X, N,MUL_X, N,DIV_X, N,WA_X, WB_X, PCR_N,SYNC_N,N,N,N,N),
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BLT-> List(Y, N,BR_LT, REN_Y,REN_Y,A2_BTYPE,DW_X, FN_ADD, M_N,M_X, MT_X, N,MUL_X, N,DIV_X, WEN_N,WA_X, WB_X, PCR_N,SYNC_N,N,N,N,N),
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BLT-> List(Y, N,N,BR_LT, Y,Y,A2_BTYPE,DW_X, FN_ADD, N,M_X, MT_X, N,MUL_X, N,DIV_X, N,WA_X, WB_X, PCR_N,SYNC_N,N,N,N,N),
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BLTU-> List(Y, N,BR_LTU,REN_Y,REN_Y,A2_BTYPE,DW_X, FN_ADD, M_N,M_X, MT_X, N,MUL_X, N,DIV_X, WEN_N,WA_X, WB_X, PCR_N,SYNC_N,N,N,N,N),
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BLTU-> List(Y, N,N,BR_LTU,Y,Y,A2_BTYPE,DW_X, FN_ADD, N,M_X, MT_X, N,MUL_X, N,DIV_X, N,WA_X, WB_X, PCR_N,SYNC_N,N,N,N,N),
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BGE-> List(Y, N,BR_GE, REN_Y,REN_Y,A2_BTYPE,DW_X, FN_ADD, M_N,M_X, MT_X, N,MUL_X, N,DIV_X, WEN_N,WA_X, WB_X, PCR_N,SYNC_N,N,N,N,N),
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BGE-> List(Y, N,N,BR_GE, Y,Y,A2_BTYPE,DW_X, FN_ADD, N,M_X, MT_X, N,MUL_X, N,DIV_X, N,WA_X, WB_X, PCR_N,SYNC_N,N,N,N,N),
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BGEU-> List(Y, N,BR_GEU,REN_Y,REN_Y,A2_BTYPE,DW_X, FN_ADD, M_N,M_X, MT_X, N,MUL_X, N,DIV_X, WEN_N,WA_X, WB_X, PCR_N,SYNC_N,N,N,N,N),
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BGEU-> List(Y, N,N,BR_GEU,Y,Y,A2_BTYPE,DW_X, FN_ADD, N,M_X, MT_X, N,MUL_X, N,DIV_X, N,WA_X, WB_X, PCR_N,SYNC_N,N,N,N,N),
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J-> List(Y, N,BR_J, REN_N,REN_N,A2_JTYPE,DW_X, FN_ADD, M_N,M_X, MT_X, N,MUL_X, N,DIV_X, WEN_N,WA_X, WB_X, PCR_N,SYNC_N,N,N,N,N),
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J-> List(Y, N,N,BR_J, N,N,A2_JTYPE,DW_X, FN_ADD, N,M_X, MT_X, N,MUL_X, N,DIV_X, N,WA_X, WB_X, PCR_N,SYNC_N,N,N,N,N),
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JAL-> List(Y, N,BR_J, REN_N,REN_N,A2_JTYPE,DW_X, FN_ADD, M_N,M_X, MT_X, N,MUL_X, N,DIV_X, WEN_Y,WA_RA,WB_PC, PCR_N,SYNC_N,N,N,N,N),
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JAL-> List(Y, N,N,BR_J, N,N,A2_JTYPE,DW_X, FN_ADD, N,M_X, MT_X, N,MUL_X, N,DIV_X, Y,WA_RA,WB_PC, PCR_N,SYNC_N,N,N,N,N),
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JALR_C-> List(Y, N,BR_JR, REN_N,REN_Y,A2_ITYPE,DW_XPR,FN_ADD, M_N,M_X, MT_X, N,MUL_X, N,DIV_X, WEN_Y,WA_RD,WB_PC, PCR_N,SYNC_N,N,N,N,N),
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JALR_C-> List(Y, N,N,BR_JR, N,Y,A2_ITYPE,DW_XPR,FN_ADD, N,M_X, MT_X, N,MUL_X, N,DIV_X, Y,WA_RD,WB_PC, PCR_N,SYNC_N,N,N,N,N),
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JALR_J-> List(Y, N,BR_JR, REN_N,REN_Y,A2_ITYPE,DW_XPR,FN_ADD, M_N,M_X, MT_X, N,MUL_X, N,DIV_X, WEN_Y,WA_RD,WB_PC, PCR_N,SYNC_N,N,N,N,N),
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JALR_J-> List(Y, N,N,BR_JR, N,Y,A2_ITYPE,DW_XPR,FN_ADD, N,M_X, MT_X, N,MUL_X, N,DIV_X, Y,WA_RD,WB_PC, PCR_N,SYNC_N,N,N,N,N),
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JALR_R-> List(Y, N,BR_JR, REN_N,REN_Y,A2_ITYPE,DW_XPR,FN_ADD, M_N,M_X, MT_X, N,MUL_X, N,DIV_X, WEN_Y,WA_RD,WB_PC, PCR_N,SYNC_N,N,N,N,N),
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JALR_R-> List(Y, N,N,BR_JR, N,Y,A2_ITYPE,DW_XPR,FN_ADD, N,M_X, MT_X, N,MUL_X, N,DIV_X, Y,WA_RD,WB_PC, PCR_N,SYNC_N,N,N,N,N),
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RDNPC-> List(Y, N,BR_N, REN_N,REN_Y,A2_ITYPE,DW_XPR,FN_ADD, M_N,M_X, MT_X, N,MUL_X, N,DIV_X, WEN_Y,WA_RD,WB_PC, PCR_N,SYNC_N,N,N,N,N),
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RDNPC-> List(Y, N,N,BR_N, N,Y,A2_ITYPE,DW_XPR,FN_ADD, N,M_X, MT_X, N,MUL_X, N,DIV_X, Y,WA_RD,WB_PC, PCR_N,SYNC_N,N,N,N,N),
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LB-> List(Y, N,BR_N, REN_N,REN_Y,A2_ITYPE,DW_XPR,FN_ADD, M_Y,M_XRD, MT_B, N,MUL_X, N,DIV_X, WEN_Y,WA_RD,WB_ALU,PCR_N,SYNC_N,N,N,N,N),
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LB-> List(Y, N,N,BR_N, N,Y,A2_ITYPE,DW_XPR,FN_ADD, Y,M_XRD, MT_B, N,MUL_X, N,DIV_X, Y,WA_RD,WB_ALU,PCR_N,SYNC_N,N,N,N,N),
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LH-> List(Y, N,BR_N, REN_N,REN_Y,A2_ITYPE,DW_XPR,FN_ADD, M_Y,M_XRD, MT_H, N,MUL_X, N,DIV_X, WEN_Y,WA_RD,WB_ALU,PCR_N,SYNC_N,N,N,N,N),
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LH-> List(Y, N,N,BR_N, N,Y,A2_ITYPE,DW_XPR,FN_ADD, Y,M_XRD, MT_H, N,MUL_X, N,DIV_X, Y,WA_RD,WB_ALU,PCR_N,SYNC_N,N,N,N,N),
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LW-> List(Y, N,BR_N, REN_N,REN_Y,A2_ITYPE,DW_XPR,FN_ADD, M_Y,M_XRD, MT_W, N,MUL_X, N,DIV_X, WEN_Y,WA_RD,WB_ALU,PCR_N,SYNC_N,N,N,N,N),
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LW-> List(Y, N,N,BR_N, N,Y,A2_ITYPE,DW_XPR,FN_ADD, Y,M_XRD, MT_W, N,MUL_X, N,DIV_X, Y,WA_RD,WB_ALU,PCR_N,SYNC_N,N,N,N,N),
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LD-> List(xpr64,N,BR_N, REN_N,REN_Y,A2_ITYPE,DW_XPR,FN_ADD, M_Y,M_XRD, MT_D, N,MUL_X, N,DIV_X, WEN_Y,WA_RD,WB_ALU,PCR_N,SYNC_N,N,N,N,N),
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LD-> List(xpr64,N,N,BR_N, N,Y,A2_ITYPE,DW_XPR,FN_ADD, Y,M_XRD, MT_D, N,MUL_X, N,DIV_X, Y,WA_RD,WB_ALU,PCR_N,SYNC_N,N,N,N,N),
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LBU-> List(Y, N,BR_N, REN_N,REN_Y,A2_ITYPE,DW_XPR,FN_ADD, M_Y,M_XRD, MT_BU,N,MUL_X, N,DIV_X, WEN_Y,WA_RD,WB_ALU,PCR_N,SYNC_N,N,N,N,N),
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LBU-> List(Y, N,N,BR_N, N,Y,A2_ITYPE,DW_XPR,FN_ADD, Y,M_XRD, MT_BU,N,MUL_X, N,DIV_X, Y,WA_RD,WB_ALU,PCR_N,SYNC_N,N,N,N,N),
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LHU-> List(Y, N,BR_N, REN_N,REN_Y,A2_ITYPE,DW_XPR,FN_ADD, M_Y,M_XRD, MT_HU,N,MUL_X, N,DIV_X, WEN_Y,WA_RD,WB_ALU,PCR_N,SYNC_N,N,N,N,N),
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LHU-> List(Y, N,N,BR_N, N,Y,A2_ITYPE,DW_XPR,FN_ADD, Y,M_XRD, MT_HU,N,MUL_X, N,DIV_X, Y,WA_RD,WB_ALU,PCR_N,SYNC_N,N,N,N,N),
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||||||
LWU-> List(xpr64,N,BR_N, REN_N,REN_Y,A2_ITYPE,DW_XPR,FN_ADD, M_Y,M_XRD, MT_WU,N,MUL_X, N,DIV_X, WEN_Y,WA_RD,WB_ALU,PCR_N,SYNC_N,N,N,N,N),
|
LWU-> List(xpr64,N,N,BR_N, N,Y,A2_ITYPE,DW_XPR,FN_ADD, Y,M_XRD, MT_WU,N,MUL_X, N,DIV_X, Y,WA_RD,WB_ALU,PCR_N,SYNC_N,N,N,N,N),
|
||||||
SB-> List(Y, N,BR_N, REN_Y,REN_Y,A2_BTYPE,DW_XPR,FN_ADD, M_Y,M_XWR, MT_B, N,MUL_X, N,DIV_X, WEN_N,WA_X, WB_ALU,PCR_N,SYNC_N,N,N,N,N),
|
SB-> List(Y, N,N,BR_N, Y,Y,A2_BTYPE,DW_XPR,FN_ADD, Y,M_XWR, MT_B, N,MUL_X, N,DIV_X, N,WA_X, WB_ALU,PCR_N,SYNC_N,N,N,N,N),
|
||||||
SH-> List(Y, N,BR_N, REN_Y,REN_Y,A2_BTYPE,DW_XPR,FN_ADD, M_Y,M_XWR, MT_H, N,MUL_X, N,DIV_X, WEN_N,WA_X, WB_ALU,PCR_N,SYNC_N,N,N,N,N),
|
SH-> List(Y, N,N,BR_N, Y,Y,A2_BTYPE,DW_XPR,FN_ADD, Y,M_XWR, MT_H, N,MUL_X, N,DIV_X, N,WA_X, WB_ALU,PCR_N,SYNC_N,N,N,N,N),
|
||||||
SW-> List(Y, N,BR_N, REN_Y,REN_Y,A2_BTYPE,DW_XPR,FN_ADD, M_Y,M_XWR, MT_W, N,MUL_X, N,DIV_X, WEN_N,WA_X, WB_ALU,PCR_N,SYNC_N,N,N,N,N),
|
SW-> List(Y, N,N,BR_N, Y,Y,A2_BTYPE,DW_XPR,FN_ADD, Y,M_XWR, MT_W, N,MUL_X, N,DIV_X, N,WA_X, WB_ALU,PCR_N,SYNC_N,N,N,N,N),
|
||||||
SD-> List(xpr64,N,BR_N, REN_Y,REN_Y,A2_BTYPE,DW_XPR,FN_ADD, M_Y,M_XWR, MT_D, N,MUL_X, N,DIV_X, WEN_N,WA_X, WB_ALU,PCR_N,SYNC_N,N,N,N,N),
|
SD-> List(xpr64,N,N,BR_N, Y,Y,A2_BTYPE,DW_XPR,FN_ADD, Y,M_XWR, MT_D, N,MUL_X, N,DIV_X, N,WA_X, WB_ALU,PCR_N,SYNC_N,N,N,N,N),
|
||||||
|
|
||||||
AMOADD_W-> List(Y, N,BR_N, REN_Y,REN_Y,A2_ZERO, DW_XPR,FN_ADD, M_Y,M_XA_ADD, MT_W, N,MUL_X, N,DIV_X, WEN_Y,WA_RD,WB_ALU,PCR_N,SYNC_N,N,N,N,N),
|
AMOADD_W-> List(Y, N,N,BR_N, Y,Y,A2_ZERO, DW_XPR,FN_ADD, Y,M_XA_ADD, MT_W, N,MUL_X, N,DIV_X, Y,WA_RD,WB_ALU,PCR_N,SYNC_N,N,N,N,N),
|
||||||
AMOSWAP_W-> List(Y, N,BR_N, REN_Y,REN_Y,A2_ZERO, DW_XPR,FN_ADD, M_Y,M_XA_SWAP,MT_W, N,MUL_X, N,DIV_X, WEN_Y,WA_RD,WB_ALU,PCR_N,SYNC_N,N,N,N,N),
|
AMOSWAP_W-> List(Y, N,N,BR_N, Y,Y,A2_ZERO, DW_XPR,FN_ADD, Y,M_XA_SWAP,MT_W, N,MUL_X, N,DIV_X, Y,WA_RD,WB_ALU,PCR_N,SYNC_N,N,N,N,N),
|
||||||
AMOAND_W-> List(Y, N,BR_N, REN_Y,REN_Y,A2_ZERO, DW_XPR,FN_ADD, M_Y,M_XA_AND, MT_W, N,MUL_X, N,DIV_X, WEN_Y,WA_RD,WB_ALU,PCR_N,SYNC_N,N,N,N,N),
|
AMOAND_W-> List(Y, N,N,BR_N, Y,Y,A2_ZERO, DW_XPR,FN_ADD, Y,M_XA_AND, MT_W, N,MUL_X, N,DIV_X, Y,WA_RD,WB_ALU,PCR_N,SYNC_N,N,N,N,N),
|
||||||
AMOOR_W-> List(Y, N,BR_N, REN_Y,REN_Y,A2_ZERO, DW_XPR,FN_ADD, M_Y,M_XA_OR, MT_W, N,MUL_X, N,DIV_X, WEN_Y,WA_RD,WB_ALU,PCR_N,SYNC_N,N,N,N,N),
|
AMOOR_W-> List(Y, N,N,BR_N, Y,Y,A2_ZERO, DW_XPR,FN_ADD, Y,M_XA_OR, MT_W, N,MUL_X, N,DIV_X, Y,WA_RD,WB_ALU,PCR_N,SYNC_N,N,N,N,N),
|
||||||
AMOMIN_W-> List(Y, N,BR_N, REN_Y,REN_Y,A2_ZERO, DW_XPR,FN_ADD, M_Y,M_XA_MIN, MT_W, N,MUL_X, N,DIV_X, WEN_Y,WA_RD,WB_ALU,PCR_N,SYNC_N,N,N,N,N),
|
AMOMIN_W-> List(Y, N,N,BR_N, Y,Y,A2_ZERO, DW_XPR,FN_ADD, Y,M_XA_MIN, MT_W, N,MUL_X, N,DIV_X, Y,WA_RD,WB_ALU,PCR_N,SYNC_N,N,N,N,N),
|
||||||
AMOMINU_W-> List(Y, N,BR_N, REN_Y,REN_Y,A2_ZERO, DW_XPR,FN_ADD, M_Y,M_XA_MINU,MT_W, N,MUL_X, N,DIV_X, WEN_Y,WA_RD,WB_ALU,PCR_N,SYNC_N,N,N,N,N),
|
AMOMINU_W-> List(Y, N,N,BR_N, Y,Y,A2_ZERO, DW_XPR,FN_ADD, Y,M_XA_MINU,MT_W, N,MUL_X, N,DIV_X, Y,WA_RD,WB_ALU,PCR_N,SYNC_N,N,N,N,N),
|
||||||
AMOMAX_W-> List(Y, N,BR_N, REN_Y,REN_Y,A2_ZERO, DW_XPR,FN_ADD, M_Y,M_XA_MAX, MT_W, N,MUL_X, N,DIV_X, WEN_Y,WA_RD,WB_ALU,PCR_N,SYNC_N,N,N,N,N),
|
AMOMAX_W-> List(Y, N,N,BR_N, Y,Y,A2_ZERO, DW_XPR,FN_ADD, Y,M_XA_MAX, MT_W, N,MUL_X, N,DIV_X, Y,WA_RD,WB_ALU,PCR_N,SYNC_N,N,N,N,N),
|
||||||
AMOMAXU_W-> List(Y, N,BR_N, REN_Y,REN_Y,A2_ZERO, DW_XPR,FN_ADD, M_Y,M_XA_MAXU,MT_W, N,MUL_X, N,DIV_X, WEN_Y,WA_RD,WB_ALU,PCR_N,SYNC_N,N,N,N,N),
|
AMOMAXU_W-> List(Y, N,N,BR_N, Y,Y,A2_ZERO, DW_XPR,FN_ADD, Y,M_XA_MAXU,MT_W, N,MUL_X, N,DIV_X, Y,WA_RD,WB_ALU,PCR_N,SYNC_N,N,N,N,N),
|
||||||
AMOADD_D-> List(xpr64,N,BR_N, REN_Y,REN_Y,A2_ZERO, DW_XPR,FN_ADD, M_Y,M_XA_ADD, MT_D, N,MUL_X, N,DIV_X, WEN_Y,WA_RD,WB_ALU,PCR_N,SYNC_N,N,N,N,N),
|
AMOADD_D-> List(xpr64,N,N,BR_N, Y,Y,A2_ZERO, DW_XPR,FN_ADD, Y,M_XA_ADD, MT_D, N,MUL_X, N,DIV_X, Y,WA_RD,WB_ALU,PCR_N,SYNC_N,N,N,N,N),
|
||||||
AMOSWAP_D-> List(xpr64,N,BR_N, REN_Y,REN_Y,A2_ZERO, DW_XPR,FN_ADD, M_Y,M_XA_SWAP,MT_D, N,MUL_X, N,DIV_X, WEN_Y,WA_RD,WB_ALU,PCR_N,SYNC_N,N,N,N,N),
|
AMOSWAP_D-> List(xpr64,N,N,BR_N, Y,Y,A2_ZERO, DW_XPR,FN_ADD, Y,M_XA_SWAP,MT_D, N,MUL_X, N,DIV_X, Y,WA_RD,WB_ALU,PCR_N,SYNC_N,N,N,N,N),
|
||||||
AMOAND_D-> List(xpr64,N,BR_N, REN_Y,REN_Y,A2_ZERO, DW_XPR,FN_ADD, M_Y,M_XA_AND, MT_D, N,MUL_X, N,DIV_X, WEN_Y,WA_RD,WB_ALU,PCR_N,SYNC_N,N,N,N,N),
|
AMOAND_D-> List(xpr64,N,N,BR_N, Y,Y,A2_ZERO, DW_XPR,FN_ADD, Y,M_XA_AND, MT_D, N,MUL_X, N,DIV_X, Y,WA_RD,WB_ALU,PCR_N,SYNC_N,N,N,N,N),
|
||||||
AMOOR_D-> List(xpr64,N,BR_N, REN_Y,REN_Y,A2_ZERO, DW_XPR,FN_ADD, M_Y,M_XA_OR, MT_D, N,MUL_X, N,DIV_X, WEN_Y,WA_RD,WB_ALU,PCR_N,SYNC_N,N,N,N,N),
|
AMOOR_D-> List(xpr64,N,N,BR_N, Y,Y,A2_ZERO, DW_XPR,FN_ADD, Y,M_XA_OR, MT_D, N,MUL_X, N,DIV_X, Y,WA_RD,WB_ALU,PCR_N,SYNC_N,N,N,N,N),
|
||||||
AMOMIN_D-> List(xpr64,N,BR_N, REN_Y,REN_Y,A2_ZERO, DW_XPR,FN_ADD, M_Y,M_XA_MIN, MT_D, N,MUL_X, N,DIV_X, WEN_Y,WA_RD,WB_ALU,PCR_N,SYNC_N,N,N,N,N),
|
AMOMIN_D-> List(xpr64,N,N,BR_N, Y,Y,A2_ZERO, DW_XPR,FN_ADD, Y,M_XA_MIN, MT_D, N,MUL_X, N,DIV_X, Y,WA_RD,WB_ALU,PCR_N,SYNC_N,N,N,N,N),
|
||||||
AMOMINU_D-> List(xpr64,N,BR_N, REN_Y,REN_Y,A2_ZERO, DW_XPR,FN_ADD, M_Y,M_XA_MINU,MT_D, N,MUL_X, N,DIV_X, WEN_Y,WA_RD,WB_ALU,PCR_N,SYNC_N,N,N,N,N),
|
AMOMINU_D-> List(xpr64,N,N,BR_N, Y,Y,A2_ZERO, DW_XPR,FN_ADD, Y,M_XA_MINU,MT_D, N,MUL_X, N,DIV_X, Y,WA_RD,WB_ALU,PCR_N,SYNC_N,N,N,N,N),
|
||||||
AMOMAX_D-> List(xpr64,N,BR_N, REN_Y,REN_Y,A2_ZERO, DW_XPR,FN_ADD, M_Y,M_XA_MAX, MT_D, N,MUL_X, N,DIV_X, WEN_Y,WA_RD,WB_ALU,PCR_N,SYNC_N,N,N,N,N),
|
AMOMAX_D-> List(xpr64,N,N,BR_N, Y,Y,A2_ZERO, DW_XPR,FN_ADD, Y,M_XA_MAX, MT_D, N,MUL_X, N,DIV_X, Y,WA_RD,WB_ALU,PCR_N,SYNC_N,N,N,N,N),
|
||||||
AMOMAXU_D-> List(xpr64,N,BR_N, REN_Y,REN_Y,A2_ZERO, DW_XPR,FN_ADD, M_Y,M_XA_MAXU,MT_D, N,MUL_X, N,DIV_X, WEN_Y,WA_RD,WB_ALU,PCR_N,SYNC_N,N,N,N,N),
|
AMOMAXU_D-> List(xpr64,N,N,BR_N, Y,Y,A2_ZERO, DW_XPR,FN_ADD, Y,M_XA_MAXU,MT_D, N,MUL_X, N,DIV_X, Y,WA_RD,WB_ALU,PCR_N,SYNC_N,N,N,N,N),
|
||||||
|
|
||||||
LUI-> List(Y, N,BR_N, REN_N,REN_N,A2_LTYPE,DW_XPR,FN_OP2, M_N,M_X, MT_X, N,MUL_X, N,DIV_X, WEN_Y,WA_RD,WB_ALU,PCR_N,SYNC_N,N,N,N,N),
|
LUI-> List(Y, N,N,BR_N, N,N,A2_LTYPE,DW_XPR,FN_OP2, N,M_X, MT_X, N,MUL_X, N,DIV_X, Y,WA_RD,WB_ALU,PCR_N,SYNC_N,N,N,N,N),
|
||||||
ADDI-> List(Y, N,BR_N, REN_N,REN_Y,A2_ITYPE,DW_XPR,FN_ADD, M_N,M_X, MT_X, N,MUL_X, N,DIV_X, WEN_Y,WA_RD,WB_ALU,PCR_N,SYNC_N,N,N,N,N),
|
ADDI-> List(Y, N,N,BR_N, N,Y,A2_ITYPE,DW_XPR,FN_ADD, N,M_X, MT_X, N,MUL_X, N,DIV_X, Y,WA_RD,WB_ALU,PCR_N,SYNC_N,N,N,N,N),
|
||||||
SLTI -> List(Y, N,BR_N, REN_N,REN_Y,A2_ITYPE,DW_XPR,FN_SLT, M_N,M_X, MT_X, N,MUL_X, N,DIV_X, WEN_Y,WA_RD,WB_ALU,PCR_N,SYNC_N,N,N,N,N),
|
SLTI -> List(Y, N,N,BR_N, N,Y,A2_ITYPE,DW_XPR,FN_SLT, N,M_X, MT_X, N,MUL_X, N,DIV_X, Y,WA_RD,WB_ALU,PCR_N,SYNC_N,N,N,N,N),
|
||||||
SLTIU-> List(Y, N,BR_N, REN_N,REN_Y,A2_ITYPE,DW_XPR,FN_SLTU,M_N,M_X, MT_X, N,MUL_X, N,DIV_X, WEN_Y,WA_RD,WB_ALU,PCR_N,SYNC_N,N,N,N,N),
|
SLTIU-> List(Y, N,N,BR_N, N,Y,A2_ITYPE,DW_XPR,FN_SLTU,N,M_X, MT_X, N,MUL_X, N,DIV_X, Y,WA_RD,WB_ALU,PCR_N,SYNC_N,N,N,N,N),
|
||||||
ANDI-> List(Y, N,BR_N, REN_N,REN_Y,A2_ITYPE,DW_XPR,FN_AND, M_N,M_X, MT_X, N,MUL_X, N,DIV_X, WEN_Y,WA_RD,WB_ALU,PCR_N,SYNC_N,N,N,N,N),
|
ANDI-> List(Y, N,N,BR_N, N,Y,A2_ITYPE,DW_XPR,FN_AND, N,M_X, MT_X, N,MUL_X, N,DIV_X, Y,WA_RD,WB_ALU,PCR_N,SYNC_N,N,N,N,N),
|
||||||
ORI-> List(Y, N,BR_N, REN_N,REN_Y,A2_ITYPE,DW_XPR,FN_OR, M_N,M_X, MT_X, N,MUL_X, N,DIV_X, WEN_Y,WA_RD,WB_ALU,PCR_N,SYNC_N,N,N,N,N),
|
ORI-> List(Y, N,N,BR_N, N,Y,A2_ITYPE,DW_XPR,FN_OR, N,M_X, MT_X, N,MUL_X, N,DIV_X, Y,WA_RD,WB_ALU,PCR_N,SYNC_N,N,N,N,N),
|
||||||
XORI-> List(Y, N,BR_N, REN_N,REN_Y,A2_ITYPE,DW_XPR,FN_XOR, M_N,M_X, MT_X, N,MUL_X, N,DIV_X, WEN_Y,WA_RD,WB_ALU,PCR_N,SYNC_N,N,N,N,N),
|
XORI-> List(Y, N,N,BR_N, N,Y,A2_ITYPE,DW_XPR,FN_XOR, N,M_X, MT_X, N,MUL_X, N,DIV_X, Y,WA_RD,WB_ALU,PCR_N,SYNC_N,N,N,N,N),
|
||||||
SLLI-> List(Y, N,BR_N, REN_N,REN_Y,A2_ITYPE,DW_XPR,FN_SL, M_N,M_X, MT_X, N,MUL_X, N,DIV_X, WEN_Y,WA_RD,WB_ALU,PCR_N,SYNC_N,N,N,N,N),
|
SLLI-> List(Y, N,N,BR_N, N,Y,A2_ITYPE,DW_XPR,FN_SL, N,M_X, MT_X, N,MUL_X, N,DIV_X, Y,WA_RD,WB_ALU,PCR_N,SYNC_N,N,N,N,N),
|
||||||
SRLI-> List(Y, N,BR_N, REN_N,REN_Y,A2_ITYPE,DW_XPR,FN_SR, M_N,M_X, MT_X, N,MUL_X, N,DIV_X, WEN_Y,WA_RD,WB_ALU,PCR_N,SYNC_N,N,N,N,N),
|
SRLI-> List(Y, N,N,BR_N, N,Y,A2_ITYPE,DW_XPR,FN_SR, N,M_X, MT_X, N,MUL_X, N,DIV_X, Y,WA_RD,WB_ALU,PCR_N,SYNC_N,N,N,N,N),
|
||||||
SRAI-> List(Y, N,BR_N, REN_N,REN_Y,A2_ITYPE,DW_XPR,FN_SRA, M_N,M_X, MT_X, N,MUL_X, N,DIV_X, WEN_Y,WA_RD,WB_ALU,PCR_N,SYNC_N,N,N,N,N),
|
SRAI-> List(Y, N,N,BR_N, N,Y,A2_ITYPE,DW_XPR,FN_SRA, N,M_X, MT_X, N,MUL_X, N,DIV_X, Y,WA_RD,WB_ALU,PCR_N,SYNC_N,N,N,N,N),
|
||||||
ADD-> List(Y, N,BR_N, REN_Y,REN_Y,A2_RTYPE,DW_XPR,FN_ADD, M_N,M_X, MT_X, N,MUL_X, N,DIV_X, WEN_Y,WA_RD,WB_ALU,PCR_N,SYNC_N,N,N,N,N),
|
ADD-> List(Y, N,N,BR_N, Y,Y,A2_RTYPE,DW_XPR,FN_ADD, N,M_X, MT_X, N,MUL_X, N,DIV_X, Y,WA_RD,WB_ALU,PCR_N,SYNC_N,N,N,N,N),
|
||||||
SUB-> List(Y, N,BR_N, REN_Y,REN_Y,A2_RTYPE,DW_XPR,FN_SUB, M_N,M_X, MT_X, N,MUL_X, N,DIV_X, WEN_Y,WA_RD,WB_ALU,PCR_N,SYNC_N,N,N,N,N),
|
SUB-> List(Y, N,N,BR_N, Y,Y,A2_RTYPE,DW_XPR,FN_SUB, N,M_X, MT_X, N,MUL_X, N,DIV_X, Y,WA_RD,WB_ALU,PCR_N,SYNC_N,N,N,N,N),
|
||||||
SLT-> List(Y, N,BR_N, REN_Y,REN_Y,A2_RTYPE,DW_XPR,FN_SLT, M_N,M_X, MT_X, N,MUL_X, N,DIV_X, WEN_Y,WA_RD,WB_ALU,PCR_N,SYNC_N,N,N,N,N),
|
SLT-> List(Y, N,N,BR_N, Y,Y,A2_RTYPE,DW_XPR,FN_SLT, N,M_X, MT_X, N,MUL_X, N,DIV_X, Y,WA_RD,WB_ALU,PCR_N,SYNC_N,N,N,N,N),
|
||||||
SLTU-> List(Y, N,BR_N, REN_Y,REN_Y,A2_RTYPE,DW_XPR,FN_SLTU,M_N,M_X, MT_X, N,MUL_X, N,DIV_X, WEN_Y,WA_RD,WB_ALU,PCR_N,SYNC_N,N,N,N,N),
|
SLTU-> List(Y, N,N,BR_N, Y,Y,A2_RTYPE,DW_XPR,FN_SLTU,N,M_X, MT_X, N,MUL_X, N,DIV_X, Y,WA_RD,WB_ALU,PCR_N,SYNC_N,N,N,N,N),
|
||||||
riscvAND-> List(Y, N,BR_N, REN_Y,REN_Y,A2_RTYPE,DW_XPR,FN_AND, M_N,M_X, MT_X, N,MUL_X, N,DIV_X, WEN_Y,WA_RD,WB_ALU,PCR_N,SYNC_N,N,N,N,N),
|
riscvAND-> List(Y, N,N,BR_N, Y,Y,A2_RTYPE,DW_XPR,FN_AND, N,M_X, MT_X, N,MUL_X, N,DIV_X, Y,WA_RD,WB_ALU,PCR_N,SYNC_N,N,N,N,N),
|
||||||
riscvOR-> List(Y, N,BR_N, REN_Y,REN_Y,A2_RTYPE,DW_XPR,FN_OR, M_N,M_X, MT_X, N,MUL_X, N,DIV_X, WEN_Y,WA_RD,WB_ALU,PCR_N,SYNC_N,N,N,N,N),
|
riscvOR-> List(Y, N,N,BR_N, Y,Y,A2_RTYPE,DW_XPR,FN_OR, N,M_X, MT_X, N,MUL_X, N,DIV_X, Y,WA_RD,WB_ALU,PCR_N,SYNC_N,N,N,N,N),
|
||||||
riscvXOR-> List(Y, N,BR_N, REN_Y,REN_Y,A2_RTYPE,DW_XPR,FN_XOR, M_N,M_X, MT_X, N,MUL_X, N,DIV_X, WEN_Y,WA_RD,WB_ALU,PCR_N,SYNC_N,N,N,N,N),
|
riscvXOR-> List(Y, N,N,BR_N, Y,Y,A2_RTYPE,DW_XPR,FN_XOR, N,M_X, MT_X, N,MUL_X, N,DIV_X, Y,WA_RD,WB_ALU,PCR_N,SYNC_N,N,N,N,N),
|
||||||
SLL-> List(Y, N,BR_N, REN_Y,REN_Y,A2_RTYPE,DW_XPR,FN_SL, M_N,M_X, MT_X, N,MUL_X, N,DIV_X, WEN_Y,WA_RD,WB_ALU,PCR_N,SYNC_N,N,N,N,N),
|
SLL-> List(Y, N,N,BR_N, Y,Y,A2_RTYPE,DW_XPR,FN_SL, N,M_X, MT_X, N,MUL_X, N,DIV_X, Y,WA_RD,WB_ALU,PCR_N,SYNC_N,N,N,N,N),
|
||||||
SRL-> List(Y, N,BR_N, REN_Y,REN_Y,A2_RTYPE,DW_XPR,FN_SR, M_N,M_X, MT_X, N,MUL_X, N,DIV_X, WEN_Y,WA_RD,WB_ALU,PCR_N,SYNC_N,N,N,N,N),
|
SRL-> List(Y, N,N,BR_N, Y,Y,A2_RTYPE,DW_XPR,FN_SR, N,M_X, MT_X, N,MUL_X, N,DIV_X, Y,WA_RD,WB_ALU,PCR_N,SYNC_N,N,N,N,N),
|
||||||
SRA-> List(Y, N,BR_N, REN_Y,REN_Y,A2_RTYPE,DW_XPR,FN_SRA, M_N,M_X, MT_X, N,MUL_X, N,DIV_X, WEN_Y,WA_RD,WB_ALU,PCR_N,SYNC_N,N,N,N,N),
|
SRA-> List(Y, N,N,BR_N, Y,Y,A2_RTYPE,DW_XPR,FN_SRA, N,M_X, MT_X, N,MUL_X, N,DIV_X, Y,WA_RD,WB_ALU,PCR_N,SYNC_N,N,N,N,N),
|
||||||
|
|
||||||
ADDIW-> List(xpr64,N,BR_N, REN_N,REN_Y,A2_ITYPE,DW_32,FN_ADD, M_N,M_X, MT_X, N,MUL_X, N,DIV_X, WEN_Y,WA_RD,WB_ALU,PCR_N,SYNC_N,N,N,N,N),
|
ADDIW-> List(xpr64,N,N,BR_N, N,Y,A2_ITYPE,DW_32,FN_ADD, N,M_X, MT_X, N,MUL_X, N,DIV_X, Y,WA_RD,WB_ALU,PCR_N,SYNC_N,N,N,N,N),
|
||||||
SLLIW-> List(xpr64,N,BR_N, REN_N,REN_Y,A2_ITYPE,DW_32,FN_SL, M_N,M_X, MT_X, N,MUL_X, N,DIV_X, WEN_Y,WA_RD,WB_ALU,PCR_N,SYNC_N,N,N,N,N),
|
SLLIW-> List(xpr64,N,N,BR_N, N,Y,A2_ITYPE,DW_32,FN_SL, N,M_X, MT_X, N,MUL_X, N,DIV_X, Y,WA_RD,WB_ALU,PCR_N,SYNC_N,N,N,N,N),
|
||||||
SRLIW-> List(xpr64,N,BR_N, REN_N,REN_Y,A2_ITYPE,DW_32,FN_SR, M_N,M_X, MT_X, N,MUL_X, N,DIV_X, WEN_Y,WA_RD,WB_ALU,PCR_N,SYNC_N,N,N,N,N),
|
SRLIW-> List(xpr64,N,N,BR_N, N,Y,A2_ITYPE,DW_32,FN_SR, N,M_X, MT_X, N,MUL_X, N,DIV_X, Y,WA_RD,WB_ALU,PCR_N,SYNC_N,N,N,N,N),
|
||||||
SRAIW-> List(xpr64,N,BR_N, REN_N,REN_Y,A2_ITYPE,DW_32,FN_SRA, M_N,M_X, MT_X, N,MUL_X, N,DIV_X, WEN_Y,WA_RD,WB_ALU,PCR_N,SYNC_N,N,N,N,N),
|
SRAIW-> List(xpr64,N,N,BR_N, N,Y,A2_ITYPE,DW_32,FN_SRA, N,M_X, MT_X, N,MUL_X, N,DIV_X, Y,WA_RD,WB_ALU,PCR_N,SYNC_N,N,N,N,N),
|
||||||
ADDW-> List(xpr64,N,BR_N, REN_Y,REN_Y,A2_RTYPE,DW_32,FN_ADD, M_N,M_X, MT_X, N,MUL_X, N,DIV_X, WEN_Y,WA_RD,WB_ALU,PCR_N,SYNC_N,N,N,N,N),
|
ADDW-> List(xpr64,N,N,BR_N, Y,Y,A2_RTYPE,DW_32,FN_ADD, N,M_X, MT_X, N,MUL_X, N,DIV_X, Y,WA_RD,WB_ALU,PCR_N,SYNC_N,N,N,N,N),
|
||||||
SUBW-> List(xpr64,N,BR_N, REN_Y,REN_Y,A2_RTYPE,DW_32,FN_SUB, M_N,M_X, MT_X, N,MUL_X, N,DIV_X, WEN_Y,WA_RD,WB_ALU,PCR_N,SYNC_N,N,N,N,N),
|
SUBW-> List(xpr64,N,N,BR_N, Y,Y,A2_RTYPE,DW_32,FN_SUB, N,M_X, MT_X, N,MUL_X, N,DIV_X, Y,WA_RD,WB_ALU,PCR_N,SYNC_N,N,N,N,N),
|
||||||
SLLW-> List(xpr64,N,BR_N, REN_Y,REN_Y,A2_RTYPE,DW_32,FN_SL, M_N,M_X, MT_X, N,MUL_X, N,DIV_X, WEN_Y,WA_RD,WB_ALU,PCR_N,SYNC_N,N,N,N,N),
|
SLLW-> List(xpr64,N,N,BR_N, Y,Y,A2_RTYPE,DW_32,FN_SL, N,M_X, MT_X, N,MUL_X, N,DIV_X, Y,WA_RD,WB_ALU,PCR_N,SYNC_N,N,N,N,N),
|
||||||
SRLW-> List(xpr64,N,BR_N, REN_Y,REN_Y,A2_RTYPE,DW_32,FN_SR, M_N,M_X, MT_X, N,MUL_X, N,DIV_X, WEN_Y,WA_RD,WB_ALU,PCR_N,SYNC_N,N,N,N,N),
|
SRLW-> List(xpr64,N,N,BR_N, Y,Y,A2_RTYPE,DW_32,FN_SR, N,M_X, MT_X, N,MUL_X, N,DIV_X, Y,WA_RD,WB_ALU,PCR_N,SYNC_N,N,N,N,N),
|
||||||
SRAW-> List(xpr64,N,BR_N, REN_Y,REN_Y,A2_RTYPE,DW_32,FN_SRA, M_N,M_X, MT_X, N,MUL_X, N,DIV_X, WEN_Y,WA_RD,WB_ALU,PCR_N,SYNC_N,N,N,N,N),
|
SRAW-> List(xpr64,N,N,BR_N, Y,Y,A2_RTYPE,DW_32,FN_SRA, N,M_X, MT_X, N,MUL_X, N,DIV_X, Y,WA_RD,WB_ALU,PCR_N,SYNC_N,N,N,N,N),
|
||||||
|
|
||||||
MUL-> List(Y, N,BR_N, REN_Y,REN_Y,A2_X, DW_XPR,FN_X, M_N,M_X, MT_X, Y,MUL_LO, N,DIV_X, WEN_Y,WA_RD,WB_X, PCR_N,SYNC_N,N,N,N,N),
|
MUL-> List(Y, N,N,BR_N, Y,Y,A2_X, DW_XPR,FN_X, N,M_X, MT_X, Y,MUL_LO, N,DIV_X, Y,WA_RD,WB_X, PCR_N,SYNC_N,N,N,N,N),
|
||||||
MULH-> List(Y, N,BR_N, REN_Y,REN_Y,A2_X, DW_XPR,FN_X, M_N,M_X, MT_X, Y,MUL_H, N,DIV_X, WEN_Y,WA_RD,WB_X, PCR_N,SYNC_N,N,N,N,N),
|
MULH-> List(Y, N,N,BR_N, Y,Y,A2_X, DW_XPR,FN_X, N,M_X, MT_X, Y,MUL_H, N,DIV_X, Y,WA_RD,WB_X, PCR_N,SYNC_N,N,N,N,N),
|
||||||
MULHU-> List(Y, N,BR_N, REN_Y,REN_Y,A2_X, DW_XPR,FN_X, M_N,M_X, MT_X, Y,MUL_HU, N,DIV_X, WEN_Y,WA_RD,WB_X, PCR_N,SYNC_N,N,N,N,N),
|
MULHU-> List(Y, N,N,BR_N, Y,Y,A2_X, DW_XPR,FN_X, N,M_X, MT_X, Y,MUL_HU, N,DIV_X, Y,WA_RD,WB_X, PCR_N,SYNC_N,N,N,N,N),
|
||||||
MULHSU-> List(Y, N,BR_N, REN_Y,REN_Y,A2_X, DW_XPR,FN_X, M_N,M_X, MT_X, Y,MUL_HSU,N,DIV_X, WEN_Y,WA_RD,WB_X, PCR_N,SYNC_N,N,N,N,N),
|
MULHSU-> List(Y, N,N,BR_N, Y,Y,A2_X, DW_XPR,FN_X, N,M_X, MT_X, Y,MUL_HSU,N,DIV_X, Y,WA_RD,WB_X, PCR_N,SYNC_N,N,N,N,N),
|
||||||
MULW-> List(xpr64,N,BR_N, REN_Y,REN_Y,A2_X, DW_32, FN_X, M_N,M_X, MT_X, Y,MUL_LO, N,DIV_X, WEN_Y,WA_RD,WB_X, PCR_N,SYNC_N,N,N,N,N),
|
MULW-> List(xpr64,N,N,BR_N, Y,Y,A2_X, DW_32, FN_X, N,M_X, MT_X, Y,MUL_LO, N,DIV_X, Y,WA_RD,WB_X, PCR_N,SYNC_N,N,N,N,N),
|
||||||
|
|
||||||
DIV-> List(Y, N,BR_N, REN_Y,REN_Y,A2_X, DW_XPR,FN_X, M_N,M_X, MT_X, N,MUL_X, Y,DIV_D, WEN_Y,WA_RD,WB_X, PCR_N,SYNC_N,N,N,N,N),
|
DIV-> List(Y, N,N,BR_N, Y,Y,A2_X, DW_XPR,FN_X, N,M_X, MT_X, N,MUL_X, Y,DIV_D, Y,WA_RD,WB_X, PCR_N,SYNC_N,N,N,N,N),
|
||||||
DIVU-> List(Y, N,BR_N, REN_Y,REN_Y,A2_X, DW_XPR,FN_X, M_N,M_X, MT_X, N,MUL_X, Y,DIV_DU,WEN_Y,WA_RD,WB_X, PCR_N,SYNC_N,N,N,N,N),
|
DIVU-> List(Y, N,N,BR_N, Y,Y,A2_X, DW_XPR,FN_X, N,M_X, MT_X, N,MUL_X, Y,DIV_DU,Y,WA_RD,WB_X, PCR_N,SYNC_N,N,N,N,N),
|
||||||
REM-> List(Y, N,BR_N, REN_Y,REN_Y,A2_X, DW_XPR,FN_X, M_N,M_X, MT_X, N,MUL_X, Y,DIV_R, WEN_Y,WA_RD,WB_X, PCR_N,SYNC_N,N,N,N,N),
|
REM-> List(Y, N,N,BR_N, Y,Y,A2_X, DW_XPR,FN_X, N,M_X, MT_X, N,MUL_X, Y,DIV_R, Y,WA_RD,WB_X, PCR_N,SYNC_N,N,N,N,N),
|
||||||
REMU-> List(Y, N,BR_N, REN_Y,REN_Y,A2_X, DW_XPR,FN_X, M_N,M_X, MT_X, N,MUL_X, Y,DIV_RU,WEN_Y,WA_RD,WB_X, PCR_N,SYNC_N,N,N,N,N),
|
REMU-> List(Y, N,N,BR_N, Y,Y,A2_X, DW_XPR,FN_X, N,M_X, MT_X, N,MUL_X, Y,DIV_RU,Y,WA_RD,WB_X, PCR_N,SYNC_N,N,N,N,N),
|
||||||
DIVW-> List(xpr64,N,BR_N, REN_Y,REN_Y,A2_X, DW_32, FN_X, M_N,M_X, MT_X, N,MUL_X, Y,DIV_D, WEN_Y,WA_RD,WB_X, PCR_N,SYNC_N,N,N,N,N),
|
DIVW-> List(xpr64,N,N,BR_N, Y,Y,A2_X, DW_32, FN_X, N,M_X, MT_X, N,MUL_X, Y,DIV_D, Y,WA_RD,WB_X, PCR_N,SYNC_N,N,N,N,N),
|
||||||
DIVUW-> List(xpr64,N,BR_N, REN_Y,REN_Y,A2_X, DW_32, FN_X, M_N,M_X, MT_X, N,MUL_X, Y,DIV_DU,WEN_Y,WA_RD,WB_X, PCR_N,SYNC_N,N,N,N,N),
|
DIVUW-> List(xpr64,N,N,BR_N, Y,Y,A2_X, DW_32, FN_X, N,M_X, MT_X, N,MUL_X, Y,DIV_DU,Y,WA_RD,WB_X, PCR_N,SYNC_N,N,N,N,N),
|
||||||
REMW-> List(xpr64,N,BR_N, REN_Y,REN_Y,A2_X, DW_32, FN_X, M_N,M_X, MT_X, N,MUL_X, Y,DIV_R, WEN_Y,WA_RD,WB_X, PCR_N,SYNC_N,N,N,N,N),
|
REMW-> List(xpr64,N,N,BR_N, Y,Y,A2_X, DW_32, FN_X, N,M_X, MT_X, N,MUL_X, Y,DIV_R, Y,WA_RD,WB_X, PCR_N,SYNC_N,N,N,N,N),
|
||||||
REMUW-> List(xpr64,N,BR_N, REN_Y,REN_Y,A2_X, DW_32, FN_X, M_N,M_X, MT_X, N,MUL_X, Y,DIV_RU,WEN_Y,WA_RD,WB_X, PCR_N,SYNC_N,N,N,N,N),
|
REMUW-> List(xpr64,N,N,BR_N, Y,Y,A2_X, DW_32, FN_X, N,M_X, MT_X, N,MUL_X, Y,DIV_RU,Y,WA_RD,WB_X, PCR_N,SYNC_N,N,N,N,N),
|
||||||
|
|
||||||
SYSCALL-> List(Y, N,BR_N, REN_N,REN_N,A2_X, DW_X, FN_X, M_N,M_X, MT_X, N,MUL_X, N,DIV_X, WEN_N,WA_X, WB_X, PCR_N,SYNC_N,N,Y,N,N),
|
SYSCALL-> List(Y, N,N,BR_N, N,N,A2_X, DW_X, FN_X, N,M_X, MT_X, N,MUL_X, N,DIV_X, N,WA_X, WB_X, PCR_N,SYNC_N,N,Y,N,N),
|
||||||
SETPCR-> List(Y, N,BR_N, REN_N,REN_N,A2_ITYPE,DW_XPR,FN_OP2, M_N,M_X, MT_X, N,MUL_X, N,DIV_X, WEN_N,WA_X, WB_ALU,PCR_S,SYNC_N,N,N,Y,Y),
|
SETPCR-> List(Y, N,N,BR_N, N,N,A2_ITYPE,DW_XPR,FN_OP2, N,M_X, MT_X, N,MUL_X, N,DIV_X, N,WA_X, WB_ALU,PCR_S,SYNC_N,N,N,Y,Y),
|
||||||
CLEARPCR-> List(Y, N,BR_N, REN_N,REN_N,A2_ITYPE,DW_XPR,FN_OP2, M_N,M_X, MT_X, N,MUL_X, N,DIV_X, WEN_N,WA_X, WB_ALU,PCR_C,SYNC_N,N,N,Y,Y),
|
CLEARPCR-> List(Y, N,N,BR_N, N,N,A2_ITYPE,DW_XPR,FN_OP2, N,M_X, MT_X, N,MUL_X, N,DIV_X, N,WA_X, WB_ALU,PCR_C,SYNC_N,N,N,Y,Y),
|
||||||
ERET-> List(Y, N,BR_N, REN_N,REN_N,A2_X, DW_X, FN_X, M_N,M_X, MT_X, N,MUL_X, N,DIV_X, WEN_N,WA_X, WB_X, PCR_N,SYNC_N,Y,N,Y,N),
|
ERET-> List(Y, N,N,BR_N, N,N,A2_X, DW_X, FN_X, N,M_X, MT_X, N,MUL_X, N,DIV_X, N,WA_X, WB_X, PCR_N,SYNC_N,Y,N,Y,N),
|
||||||
FENCE-> List(Y, N,BR_N, REN_N,REN_N,A2_X, DW_X, FN_X, M_Y,M_FENCE, MT_X, N,MUL_X, N,DIV_X, WEN_N,WA_X, WB_X, PCR_N,SYNC_D,N,N,N,N),
|
FENCE-> List(Y, N,N,BR_N, N,N,A2_X, DW_X, FN_X, Y,M_FENCE, MT_X, N,MUL_X, N,DIV_X, N,WA_X, WB_X, PCR_N,SYNC_D,N,N,N,N),
|
||||||
FENCE_I-> List(Y, N,BR_N, REN_N,REN_N,A2_X, DW_X, FN_X, M_Y,M_FLA, MT_X, N,MUL_X, N,DIV_X, WEN_N,WA_X, WB_X, PCR_N,SYNC_I,N,N,N,Y),
|
FENCE_I-> List(Y, N,N,BR_N, N,N,A2_X, DW_X, FN_X, Y,M_FLA, MT_X, N,MUL_X, N,DIV_X, N,WA_X, WB_X, PCR_N,SYNC_I,N,N,N,Y),
|
||||||
CFLUSH-> List(Y, N,BR_N, REN_N,REN_N,A2_X, DW_X, FN_X, M_Y,M_FLA, MT_X, N,MUL_X, N,DIV_X, WEN_N,WA_X, WB_X, PCR_N,SYNC_N,N,N,Y,Y),
|
CFLUSH-> List(Y, N,N,BR_N, N,N,A2_X, DW_X, FN_X, Y,M_FLA, MT_X, N,MUL_X, N,DIV_X, N,WA_X, WB_X, PCR_N,SYNC_N,N,N,Y,Y),
|
||||||
MFPCR-> List(Y, N,BR_N, REN_N,REN_N,A2_X, DW_X, FN_X, M_N,M_X, MT_X, N,MUL_X, N,DIV_X, WEN_Y,WA_RD,WB_X, PCR_F,SYNC_N,N,N,Y,Y),
|
MFPCR-> List(Y, N,N,BR_N, N,N,A2_X, DW_X, FN_X, N,M_X, MT_X, N,MUL_X, N,DIV_X, Y,WA_RD,WB_X, PCR_F,SYNC_N,N,N,Y,Y),
|
||||||
MTPCR-> List(Y, N,BR_N, REN_Y,REN_N,A2_RTYPE,DW_XPR,FN_OP2, M_N,M_X, MT_X, N,MUL_X, N,DIV_X, WEN_Y,WA_RD,WB_ALU,PCR_T,SYNC_N,N,N,Y,Y),
|
MTPCR-> List(Y, N,N,BR_N, Y,N,A2_RTYPE,DW_XPR,FN_OP2, N,M_X, MT_X, N,MUL_X, N,DIV_X, Y,WA_RD,WB_ALU,PCR_T,SYNC_N,N,N,Y,Y),
|
||||||
RDTIME-> List(Y, N,BR_N, REN_N,REN_N,A2_X, DW_XPR,FN_X, M_N,M_X, MT_X, N,MUL_X, N,DIV_X, WEN_Y,WA_RD,WB_TSC,PCR_N,SYNC_N,N,N,N,N),
|
RDTIME-> List(Y, N,N,BR_N, N,N,A2_X, DW_XPR,FN_X, N,M_X, MT_X, N,MUL_X, N,DIV_X, Y,WA_RD,WB_TSC,PCR_N,SYNC_N,N,N,N,N),
|
||||||
RDCYCLE-> List(Y, N,BR_N, REN_N,REN_N,A2_X, DW_XPR,FN_X, M_N,M_X, MT_X, N,MUL_X, N,DIV_X, WEN_Y,WA_RD,WB_TSC,PCR_N,SYNC_N,N,N,N,N),
|
RDCYCLE-> List(Y, N,N,BR_N, N,N,A2_X, DW_XPR,FN_X, N,M_X, MT_X, N,MUL_X, N,DIV_X, Y,WA_RD,WB_TSC,PCR_N,SYNC_N,N,N,N,N),
|
||||||
RDINSTRET-> List(Y, N,BR_N, REN_N,REN_N,A2_X, DW_XPR,FN_X, M_N,M_X, MT_X, N,MUL_X, N,DIV_X, WEN_Y,WA_RD,WB_IRT,PCR_N,SYNC_N,N,N,N,N))
|
RDINSTRET-> List(Y, N,N,BR_N, N,N,A2_X, DW_XPR,FN_X, N,M_X, MT_X, N,MUL_X, N,DIV_X, Y,WA_RD,WB_IRT,PCR_N,SYNC_N,N,N,N,N))
|
||||||
|
|
||||||
val fdecode = Array(
|
val fdecode = Array(
|
||||||
// eret
|
// eret
|
||||||
// | syscall
|
// fp_val renx2 | syscall
|
||||||
// vec_val mem_val mul_val div_val pcr | | privileged
|
// | vec_val | renx1 mem_val mul_val div_val wen pcr | | privileged
|
||||||
// val | brtype renx2 renx1 s_alu2 dw alu | mem_cmd mem_type| mul_fn | div_fn wen s_wa s_wb | sync | | | replay_next
|
// val | | brtype | | s_alu2 dw alu | mem_cmd mem_type| mul_fn | div_fn | s_wa s_wb | sync | | | replay_next
|
||||||
// | | | | | | | | | | | | | | | | | | | | | | | |
|
// | | | | | | | | | | | | | | | | | | | | | | | | |
|
||||||
MFTX_S-> List(FPU_Y,N,BR_N, REN_N,REN_N,A2_X, DW_X, FN_X, M_N,M_X, MT_X, N,MUL_X, N,DIV_X, WEN_Y,WA_X, WB_X, PCR_N,SYNC_N,N,N,N,N),
|
FCVT_S_D-> List(FPU_Y,Y,N,BR_N, N,N,A2_X, DW_X, FN_X, N,M_X, MT_X, N,MUL_X, N,DIV_X, N,WA_RD,WB_X, PCR_N,SYNC_N,N,N,N,N),
|
||||||
MFTX_D-> List(FPU_Y,N,BR_N, REN_N,REN_N,A2_X, DW_X, FN_X, M_N,M_X, MT_X, N,MUL_X, N,DIV_X, WEN_Y,WA_X, WB_X, PCR_N,SYNC_N,N,N,N,N),
|
FCVT_D_S-> List(FPU_Y,Y,N,BR_N, N,N,A2_X, DW_X, FN_X, N,M_X, MT_X, N,MUL_X, N,DIV_X, N,WA_RD,WB_X, PCR_N,SYNC_N,N,N,N,N),
|
||||||
FCVT_W_S-> List(FPU_Y,N,BR_N, REN_N,REN_N,A2_X, DW_X, FN_X, M_N,M_X, MT_X, N,MUL_X, N,DIV_X, WEN_Y,WA_X, WB_X, PCR_N,SYNC_N,N,N,N,N),
|
FSGNJ_S-> List(FPU_Y,Y,N,BR_N, N,N,A2_X, DW_X, FN_X, N,M_X, MT_X, N,MUL_X, N,DIV_X, N,WA_RD,WB_X, PCR_N,SYNC_N,N,N,N,N),
|
||||||
FCVT_W_D-> List(FPU_Y,N,BR_N, REN_N,REN_N,A2_X, DW_X, FN_X, M_N,M_X, MT_X, N,MUL_X, N,DIV_X, WEN_Y,WA_X, WB_X, PCR_N,SYNC_N,N,N,N,N),
|
FSGNJ_D-> List(FPU_Y,Y,N,BR_N, N,N,A2_X, DW_X, FN_X, N,M_X, MT_X, N,MUL_X, N,DIV_X, N,WA_RD,WB_X, PCR_N,SYNC_N,N,N,N,N),
|
||||||
FCVT_WU_S-> List(FPU_Y,N,BR_N, REN_N,REN_N,A2_X, DW_X, FN_X, M_N,M_X, MT_X, N,MUL_X, N,DIV_X, WEN_Y,WA_X, WB_X, PCR_N,SYNC_N,N,N,N,N),
|
FSGNJX_S-> List(FPU_Y,Y,N,BR_N, N,N,A2_X, DW_X, FN_X, N,M_X, MT_X, N,MUL_X, N,DIV_X, N,WA_RD,WB_X, PCR_N,SYNC_N,N,N,N,N),
|
||||||
FCVT_WU_D-> List(FPU_Y,N,BR_N, REN_N,REN_N,A2_X, DW_X, FN_X, M_N,M_X, MT_X, N,MUL_X, N,DIV_X, WEN_Y,WA_X, WB_X, PCR_N,SYNC_N,N,N,N,N),
|
FSGNJX_D-> List(FPU_Y,Y,N,BR_N, N,N,A2_X, DW_X, FN_X, N,M_X, MT_X, N,MUL_X, N,DIV_X, N,WA_RD,WB_X, PCR_N,SYNC_N,N,N,N,N),
|
||||||
FCVT_L_S-> List(FPU_Y,N,BR_N, REN_N,REN_N,A2_X, DW_X, FN_X, M_N,M_X, MT_X, N,MUL_X, N,DIV_X, WEN_Y,WA_X, WB_X, PCR_N,SYNC_N,N,N,N,N),
|
FSGNJN_S-> List(FPU_Y,Y,N,BR_N, N,N,A2_X, DW_X, FN_X, N,M_X, MT_X, N,MUL_X, N,DIV_X, N,WA_RD,WB_X, PCR_N,SYNC_N,N,N,N,N),
|
||||||
FCVT_L_D-> List(FPU_Y,N,BR_N, REN_N,REN_N,A2_X, DW_X, FN_X, M_N,M_X, MT_X, N,MUL_X, N,DIV_X, WEN_Y,WA_X, WB_X, PCR_N,SYNC_N,N,N,N,N),
|
FSGNJN_D-> List(FPU_Y,Y,N,BR_N, N,N,A2_X, DW_X, FN_X, N,M_X, MT_X, N,MUL_X, N,DIV_X, N,WA_RD,WB_X, PCR_N,SYNC_N,N,N,N,N),
|
||||||
FCVT_LU_S-> List(FPU_Y,N,BR_N, REN_N,REN_N,A2_X, DW_X, FN_X, M_N,M_X, MT_X, N,MUL_X, N,DIV_X, WEN_Y,WA_X, WB_X, PCR_N,SYNC_N,N,N,N,N),
|
FMIN_S-> List(FPU_Y,Y,N,BR_N, N,N,A2_X, DW_X, FN_X, N,M_X, MT_X, N,MUL_X, N,DIV_X, N,WA_RD,WB_X, PCR_N,SYNC_N,N,N,N,N),
|
||||||
FCVT_LU_D-> List(FPU_Y,N,BR_N, REN_N,REN_N,A2_X, DW_X, FN_X, M_N,M_X, MT_X, N,MUL_X, N,DIV_X, WEN_Y,WA_X, WB_X, PCR_N,SYNC_N,N,N,N,N),
|
FMIN_D-> List(FPU_Y,Y,N,BR_N, N,N,A2_X, DW_X, FN_X, N,M_X, MT_X, N,MUL_X, N,DIV_X, N,WA_RD,WB_X, PCR_N,SYNC_N,N,N,N,N),
|
||||||
FEQ_S-> List(FPU_Y,N,BR_N, REN_N,REN_N,A2_X, DW_X, FN_X, M_N,M_X, MT_X, N,MUL_X, N,DIV_X, WEN_Y,WA_X, WB_X, PCR_N,SYNC_N,N,N,N,N),
|
FMAX_S-> List(FPU_Y,Y,N,BR_N, N,N,A2_X, DW_X, FN_X, N,M_X, MT_X, N,MUL_X, N,DIV_X, N,WA_RD,WB_X, PCR_N,SYNC_N,N,N,N,N),
|
||||||
FEQ_D-> List(FPU_Y,N,BR_N, REN_N,REN_N,A2_X, DW_X, FN_X, M_N,M_X, MT_X, N,MUL_X, N,DIV_X, WEN_Y,WA_X, WB_X, PCR_N,SYNC_N,N,N,N,N),
|
FMAX_D-> List(FPU_Y,Y,N,BR_N, N,N,A2_X, DW_X, FN_X, N,M_X, MT_X, N,MUL_X, N,DIV_X, N,WA_RD,WB_X, PCR_N,SYNC_N,N,N,N,N),
|
||||||
FLT_S-> List(FPU_Y,N,BR_N, REN_N,REN_N,A2_X, DW_X, FN_X, M_N,M_X, MT_X, N,MUL_X, N,DIV_X, WEN_Y,WA_X, WB_X, PCR_N,SYNC_N,N,N,N,N),
|
FADD_S-> List(FPU_Y,Y,N,BR_N, N,N,A2_X, DW_X, FN_X, N,M_X, MT_X, N,MUL_X, N,DIV_X, N,WA_RD,WB_X, PCR_N,SYNC_N,N,N,N,N),
|
||||||
FLT_D-> List(FPU_Y,N,BR_N, REN_N,REN_N,A2_X, DW_X, FN_X, M_N,M_X, MT_X, N,MUL_X, N,DIV_X, WEN_Y,WA_X, WB_X, PCR_N,SYNC_N,N,N,N,N),
|
FADD_D-> List(FPU_Y,Y,N,BR_N, N,N,A2_X, DW_X, FN_X, N,M_X, MT_X, N,MUL_X, N,DIV_X, N,WA_RD,WB_X, PCR_N,SYNC_N,N,N,N,N),
|
||||||
FLE_S-> List(FPU_Y,N,BR_N, REN_N,REN_N,A2_X, DW_X, FN_X, M_N,M_X, MT_X, N,MUL_X, N,DIV_X, WEN_Y,WA_X, WB_X, PCR_N,SYNC_N,N,N,N,N),
|
FSUB_S-> List(FPU_Y,Y,N,BR_N, N,N,A2_X, DW_X, FN_X, N,M_X, MT_X, N,MUL_X, N,DIV_X, N,WA_RD,WB_X, PCR_N,SYNC_N,N,N,N,N),
|
||||||
FLE_D-> List(FPU_Y,N,BR_N, REN_N,REN_N,A2_X, DW_X, FN_X, M_N,M_X, MT_X, N,MUL_X, N,DIV_X, WEN_Y,WA_X, WB_X, PCR_N,SYNC_N,N,N,N,N),
|
FSUB_D-> List(FPU_Y,Y,N,BR_N, N,N,A2_X, DW_X, FN_X, N,M_X, MT_X, N,MUL_X, N,DIV_X, N,WA_RD,WB_X, PCR_N,SYNC_N,N,N,N,N),
|
||||||
MXTF_S-> List(FPU_Y,N,BR_N, REN_N,REN_Y,A2_X, DW_X, FN_X, M_N,M_X, MT_X, N,MUL_X, N,DIV_X, WEN_N,WA_X, WB_X, PCR_N,SYNC_N,N,N,N,N),
|
FMUL_S-> List(FPU_Y,Y,N,BR_N, N,N,A2_X, DW_X, FN_X, N,M_X, MT_X, N,MUL_X, N,DIV_X, N,WA_RD,WB_X, PCR_N,SYNC_N,N,N,N,N),
|
||||||
MXTF_D-> List(FPU_Y,N,BR_N, REN_N,REN_Y,A2_X, DW_X, FN_X, M_N,M_X, MT_X, N,MUL_X, N,DIV_X, WEN_N,WA_X, WB_X, PCR_N,SYNC_N,N,N,N,N),
|
FMUL_D-> List(FPU_Y,Y,N,BR_N, N,N,A2_X, DW_X, FN_X, N,M_X, MT_X, N,MUL_X, N,DIV_X, N,WA_RD,WB_X, PCR_N,SYNC_N,N,N,N,N),
|
||||||
FCVT_S_W-> List(FPU_Y,N,BR_N, REN_N,REN_Y,A2_X, DW_X, FN_X, M_N,M_X, MT_X, N,MUL_X, N,DIV_X, WEN_N,WA_X, WB_X, PCR_N,SYNC_N,N,N,N,N),
|
FMADD_S-> List(FPU_Y,Y,N,BR_N, N,N,A2_X, DW_X, FN_X, N,M_X, MT_X, N,MUL_X, N,DIV_X, N,WA_RD,WB_X, PCR_N,SYNC_N,N,N,N,N),
|
||||||
FCVT_D_W-> List(FPU_Y,N,BR_N, REN_N,REN_Y,A2_X, DW_X, FN_X, M_N,M_X, MT_X, N,MUL_X, N,DIV_X, WEN_N,WA_X, WB_X, PCR_N,SYNC_N,N,N,N,N),
|
FMADD_D-> List(FPU_Y,Y,N,BR_N, N,N,A2_X, DW_X, FN_X, N,M_X, MT_X, N,MUL_X, N,DIV_X, N,WA_RD,WB_X, PCR_N,SYNC_N,N,N,N,N),
|
||||||
FCVT_S_WU-> List(FPU_Y,N,BR_N, REN_N,REN_Y,A2_X, DW_X, FN_X, M_N,M_X, MT_X, N,MUL_X, N,DIV_X, WEN_N,WA_X, WB_X, PCR_N,SYNC_N,N,N,N,N),
|
FMSUB_S-> List(FPU_Y,Y,N,BR_N, N,N,A2_X, DW_X, FN_X, N,M_X, MT_X, N,MUL_X, N,DIV_X, N,WA_RD,WB_X, PCR_N,SYNC_N,N,N,N,N),
|
||||||
FCVT_D_WU-> List(FPU_Y,N,BR_N, REN_N,REN_Y,A2_X, DW_X, FN_X, M_N,M_X, MT_X, N,MUL_X, N,DIV_X, WEN_N,WA_X, WB_X, PCR_N,SYNC_N,N,N,N,N),
|
FMSUB_D-> List(FPU_Y,Y,N,BR_N, N,N,A2_X, DW_X, FN_X, N,M_X, MT_X, N,MUL_X, N,DIV_X, N,WA_RD,WB_X, PCR_N,SYNC_N,N,N,N,N),
|
||||||
FCVT_S_L-> List(FPU_Y,N,BR_N, REN_N,REN_Y,A2_X, DW_X, FN_X, M_N,M_X, MT_X, N,MUL_X, N,DIV_X, WEN_N,WA_X, WB_X, PCR_N,SYNC_N,N,N,N,N),
|
FNMADD_S-> List(FPU_Y,Y,N,BR_N, N,N,A2_X, DW_X, FN_X, N,M_X, MT_X, N,MUL_X, N,DIV_X, N,WA_RD,WB_X, PCR_N,SYNC_N,N,N,N,N),
|
||||||
FCVT_D_L-> List(FPU_Y,N,BR_N, REN_N,REN_Y,A2_X, DW_X, FN_X, M_N,M_X, MT_X, N,MUL_X, N,DIV_X, WEN_N,WA_X, WB_X, PCR_N,SYNC_N,N,N,N,N),
|
FNMADD_D-> List(FPU_Y,Y,N,BR_N, N,N,A2_X, DW_X, FN_X, N,M_X, MT_X, N,MUL_X, N,DIV_X, N,WA_RD,WB_X, PCR_N,SYNC_N,N,N,N,N),
|
||||||
FCVT_S_LU-> List(FPU_Y,N,BR_N, REN_N,REN_Y,A2_X, DW_X, FN_X, M_N,M_X, MT_X, N,MUL_X, N,DIV_X, WEN_N,WA_X, WB_X, PCR_N,SYNC_N,N,N,N,N),
|
FNMSUB_S-> List(FPU_Y,Y,N,BR_N, N,N,A2_X, DW_X, FN_X, N,M_X, MT_X, N,MUL_X, N,DIV_X, N,WA_RD,WB_X, PCR_N,SYNC_N,N,N,N,N),
|
||||||
FCVT_D_LU-> List(FPU_Y,N,BR_N, REN_N,REN_Y,A2_X, DW_X, FN_X, M_N,M_X, MT_X, N,MUL_X, N,DIV_X, WEN_N,WA_X, WB_X, PCR_N,SYNC_N,N,N,N,N),
|
FNMSUB_D-> List(FPU_Y,Y,N,BR_N, N,N,A2_X, DW_X, FN_X, N,M_X, MT_X, N,MUL_X, N,DIV_X, N,WA_RD,WB_X, PCR_N,SYNC_N,N,N,N,N),
|
||||||
MFFSR-> List(FPU_Y,N,BR_N, REN_N,REN_N,A2_X, DW_X, FN_X, M_N,M_X, MT_X, N,MUL_X, N,DIV_X, WEN_Y,WA_X, WB_X, PCR_N,SYNC_N,N,N,N,N),
|
MFTX_S-> List(FPU_Y,Y,N,BR_N, N,N,A2_X, DW_X, FN_X, N,M_X, MT_X, N,MUL_X, N,DIV_X, Y,WA_RD,WB_X, PCR_N,SYNC_N,N,N,N,N),
|
||||||
MTFSR-> List(FPU_Y,N,BR_N, REN_N,REN_Y,A2_X, DW_X, FN_X, M_N,M_X, MT_X, N,MUL_X, N,DIV_X, WEN_Y,WA_X, WB_X, PCR_N,SYNC_N,N,N,N,N),
|
MFTX_D-> List(FPU_Y,Y,N,BR_N, N,N,A2_X, DW_X, FN_X, N,M_X, MT_X, N,MUL_X, N,DIV_X, Y,WA_RD,WB_X, PCR_N,SYNC_N,N,N,N,N),
|
||||||
FLW-> List(FPU_Y,N,BR_N, REN_N,REN_Y,A2_ITYPE,DW_XPR,FN_ADD, M_Y,M_XRD, MT_W, N,MUL_X, N,DIV_X, WEN_N,WA_X, WB_ALU,PCR_N,SYNC_N,N,N,N,N),
|
FCVT_W_S-> List(FPU_Y,Y,N,BR_N, N,N,A2_X, DW_X, FN_X, N,M_X, MT_X, N,MUL_X, N,DIV_X, Y,WA_RD,WB_X, PCR_N,SYNC_N,N,N,N,N),
|
||||||
FLD-> List(FPU_Y,N,BR_N, REN_N,REN_Y,A2_ITYPE,DW_XPR,FN_ADD, M_Y,M_XRD, MT_D, N,MUL_X, N,DIV_X, WEN_N,WA_X, WB_ALU,PCR_N,SYNC_N,N,N,N,N),
|
FCVT_W_D-> List(FPU_Y,Y,N,BR_N, N,N,A2_X, DW_X, FN_X, N,M_X, MT_X, N,MUL_X, N,DIV_X, Y,WA_RD,WB_X, PCR_N,SYNC_N,N,N,N,N),
|
||||||
FSW-> List(FPU_Y,N,BR_N, REN_N,REN_Y,A2_BTYPE,DW_XPR,FN_ADD, M_Y,M_XWR, MT_W, N,MUL_X, N,DIV_X, WEN_N,WA_X, WB_ALU,PCR_N,SYNC_N,N,N,N,N),
|
FCVT_WU_S-> List(FPU_Y,Y,N,BR_N, N,N,A2_X, DW_X, FN_X, N,M_X, MT_X, N,MUL_X, N,DIV_X, Y,WA_RD,WB_X, PCR_N,SYNC_N,N,N,N,N),
|
||||||
FSD-> List(FPU_Y,N,BR_N, REN_N,REN_Y,A2_BTYPE,DW_XPR,FN_ADD, M_Y,M_XWR, MT_D, N,MUL_X, N,DIV_X, WEN_N,WA_X, WB_ALU,PCR_N,SYNC_N,N,N,N,N))
|
FCVT_WU_D-> List(FPU_Y,Y,N,BR_N, N,N,A2_X, DW_X, FN_X, N,M_X, MT_X, N,MUL_X, N,DIV_X, Y,WA_RD,WB_X, PCR_N,SYNC_N,N,N,N,N),
|
||||||
|
FCVT_L_S-> List(FPU_Y,Y,N,BR_N, N,N,A2_X, DW_X, FN_X, N,M_X, MT_X, N,MUL_X, N,DIV_X, Y,WA_RD,WB_X, PCR_N,SYNC_N,N,N,N,N),
|
||||||
|
FCVT_L_D-> List(FPU_Y,Y,N,BR_N, N,N,A2_X, DW_X, FN_X, N,M_X, MT_X, N,MUL_X, N,DIV_X, Y,WA_RD,WB_X, PCR_N,SYNC_N,N,N,N,N),
|
||||||
|
FCVT_LU_S-> List(FPU_Y,Y,N,BR_N, N,N,A2_X, DW_X, FN_X, N,M_X, MT_X, N,MUL_X, N,DIV_X, Y,WA_RD,WB_X, PCR_N,SYNC_N,N,N,N,N),
|
||||||
|
FCVT_LU_D-> List(FPU_Y,Y,N,BR_N, N,N,A2_X, DW_X, FN_X, N,M_X, MT_X, N,MUL_X, N,DIV_X, Y,WA_RD,WB_X, PCR_N,SYNC_N,N,N,N,N),
|
||||||
|
FEQ_S-> List(FPU_Y,Y,N,BR_N, N,N,A2_X, DW_X, FN_X, N,M_X, MT_X, N,MUL_X, N,DIV_X, Y,WA_RD,WB_X, PCR_N,SYNC_N,N,N,N,N),
|
||||||
|
FEQ_D-> List(FPU_Y,Y,N,BR_N, N,N,A2_X, DW_X, FN_X, N,M_X, MT_X, N,MUL_X, N,DIV_X, Y,WA_RD,WB_X, PCR_N,SYNC_N,N,N,N,N),
|
||||||
|
FLT_S-> List(FPU_Y,Y,N,BR_N, N,N,A2_X, DW_X, FN_X, N,M_X, MT_X, N,MUL_X, N,DIV_X, Y,WA_RD,WB_X, PCR_N,SYNC_N,N,N,N,N),
|
||||||
|
FLT_D-> List(FPU_Y,Y,N,BR_N, N,N,A2_X, DW_X, FN_X, N,M_X, MT_X, N,MUL_X, N,DIV_X, Y,WA_RD,WB_X, PCR_N,SYNC_N,N,N,N,N),
|
||||||
|
FLE_S-> List(FPU_Y,Y,N,BR_N, N,N,A2_X, DW_X, FN_X, N,M_X, MT_X, N,MUL_X, N,DIV_X, Y,WA_RD,WB_X, PCR_N,SYNC_N,N,N,N,N),
|
||||||
|
FLE_D-> List(FPU_Y,Y,N,BR_N, N,N,A2_X, DW_X, FN_X, N,M_X, MT_X, N,MUL_X, N,DIV_X, Y,WA_RD,WB_X, PCR_N,SYNC_N,N,N,N,N),
|
||||||
|
MXTF_S-> List(FPU_Y,Y,N,BR_N, N,Y,A2_X, DW_X, FN_X, N,M_X, MT_X, N,MUL_X, N,DIV_X, N,WA_RD,WB_X, PCR_N,SYNC_N,N,N,N,N),
|
||||||
|
MXTF_D-> List(FPU_Y,Y,N,BR_N, N,Y,A2_X, DW_X, FN_X, N,M_X, MT_X, N,MUL_X, N,DIV_X, N,WA_RD,WB_X, PCR_N,SYNC_N,N,N,N,N),
|
||||||
|
FCVT_S_W-> List(FPU_Y,Y,N,BR_N, N,Y,A2_X, DW_X, FN_X, N,M_X, MT_X, N,MUL_X, N,DIV_X, N,WA_RD,WB_X, PCR_N,SYNC_N,N,N,N,N),
|
||||||
|
FCVT_D_W-> List(FPU_Y,Y,N,BR_N, N,Y,A2_X, DW_X, FN_X, N,M_X, MT_X, N,MUL_X, N,DIV_X, N,WA_RD,WB_X, PCR_N,SYNC_N,N,N,N,N),
|
||||||
|
FCVT_S_WU-> List(FPU_Y,Y,N,BR_N, N,Y,A2_X, DW_X, FN_X, N,M_X, MT_X, N,MUL_X, N,DIV_X, N,WA_RD,WB_X, PCR_N,SYNC_N,N,N,N,N),
|
||||||
|
FCVT_D_WU-> List(FPU_Y,Y,N,BR_N, N,Y,A2_X, DW_X, FN_X, N,M_X, MT_X, N,MUL_X, N,DIV_X, N,WA_RD,WB_X, PCR_N,SYNC_N,N,N,N,N),
|
||||||
|
FCVT_S_L-> List(FPU_Y,Y,N,BR_N, N,Y,A2_X, DW_X, FN_X, N,M_X, MT_X, N,MUL_X, N,DIV_X, N,WA_RD,WB_X, PCR_N,SYNC_N,N,N,N,N),
|
||||||
|
FCVT_D_L-> List(FPU_Y,Y,N,BR_N, N,Y,A2_X, DW_X, FN_X, N,M_X, MT_X, N,MUL_X, N,DIV_X, N,WA_RD,WB_X, PCR_N,SYNC_N,N,N,N,N),
|
||||||
|
FCVT_S_LU-> List(FPU_Y,Y,N,BR_N, N,Y,A2_X, DW_X, FN_X, N,M_X, MT_X, N,MUL_X, N,DIV_X, N,WA_RD,WB_X, PCR_N,SYNC_N,N,N,N,N),
|
||||||
|
FCVT_D_LU-> List(FPU_Y,Y,N,BR_N, N,Y,A2_X, DW_X, FN_X, N,M_X, MT_X, N,MUL_X, N,DIV_X, N,WA_RD,WB_X, PCR_N,SYNC_N,N,N,N,N),
|
||||||
|
MFFSR-> List(FPU_Y,Y,N,BR_N, N,N,A2_X, DW_X, FN_X, N,M_X, MT_X, N,MUL_X, N,DIV_X, Y,WA_RD,WB_X, PCR_N,SYNC_N,N,N,N,N),
|
||||||
|
MTFSR-> List(FPU_Y,Y,N,BR_N, N,Y,A2_X, DW_X, FN_X, N,M_X, MT_X, N,MUL_X, N,DIV_X, Y,WA_RD,WB_X, PCR_N,SYNC_N,N,N,N,N),
|
||||||
|
FLW-> List(FPU_Y,Y,N,BR_N, N,Y,A2_ITYPE,DW_XPR,FN_ADD, Y,M_XRD, MT_W, N,MUL_X, N,DIV_X, N,WA_RD,WB_ALU,PCR_N,SYNC_N,N,N,N,N),
|
||||||
|
FLD-> List(FPU_Y,Y,N,BR_N, N,Y,A2_ITYPE,DW_XPR,FN_ADD, Y,M_XRD, MT_D, N,MUL_X, N,DIV_X, N,WA_RD,WB_ALU,PCR_N,SYNC_N,N,N,N,N),
|
||||||
|
FSW-> List(FPU_Y,Y,N,BR_N, N,Y,A2_BTYPE,DW_XPR,FN_ADD, Y,M_XWR, MT_W, N,MUL_X, N,DIV_X, N,WA_X, WB_ALU,PCR_N,SYNC_N,N,N,N,N),
|
||||||
|
FSD-> List(FPU_Y,Y,N,BR_N, N,Y,A2_BTYPE,DW_XPR,FN_ADD, Y,M_XWR, MT_D, N,MUL_X, N,DIV_X, N,WA_X, WB_ALU,PCR_N,SYNC_N,N,N,N,N))
|
||||||
|
|
||||||
val vdecode = Array(
|
val vdecode = Array(
|
||||||
// eret
|
// eret
|
||||||
// | syscall
|
// fp_val renx2 | syscall
|
||||||
// vec_val mem_val mul_val div_val pcr | | privileged
|
// | vec_val | renx1 mem_val mul_val div_val wen pcr | | privileged
|
||||||
// val | brtype renx2 renx1 s_alu2 dw alu | mem_cmd mem_type| mul_fn | div_fn wen s_wa s_wb | sync | | | replay_next
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// val | | brtype | | s_alu2 dw alu | mem_cmd mem_type| mul_fn | div_fn | s_wa s_wb | sync | | | replay_next
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// | | | | | | | | | | | | | | | | | | | | | | | |
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// | | | | | | | | | | | | | | | | | | | | | | | | |
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VVCFGIVL-> List(VEC_Y,Y,BR_N, REN_N,REN_Y,A2_ZERO, DW_XPR,FN_ADD, M_N,M_X, MT_X, N,MUL_X, N,DIV_X, WEN_Y,WA_RD,WB_ALU,PCR_N,SYNC_N,N,N,N,Y),
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VVCFGIVL-> List(VEC_Y,N,Y,BR_N, N,Y,A2_ZERO, DW_XPR,FN_ADD, N,M_X, MT_X, N,MUL_X, N,DIV_X, Y,WA_RD,WB_ALU,PCR_N,SYNC_N,N,N,N,Y),
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VVCFG-> List(VEC_Y,Y,BR_N, REN_Y,REN_Y,A2_ZERO, DW_XPR,FN_ADD, M_N,M_X, MT_X, N,MUL_X, N,DIV_X, WEN_N,WA_RD,WB_ALU,PCR_N,SYNC_N,N,N,N,Y),
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VVCFG-> List(VEC_Y,N,Y,BR_N, Y,Y,A2_ZERO, DW_XPR,FN_ADD, N,M_X, MT_X, N,MUL_X, N,DIV_X, N,WA_RD,WB_ALU,PCR_N,SYNC_N,N,N,N,Y),
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VSETVL-> List(VEC_Y,Y,BR_N, REN_N,REN_Y,A2_ZERO, DW_XPR,FN_ADD, M_N,M_X, MT_X, N,MUL_X, N,DIV_X, WEN_Y,WA_RD,WB_ALU,PCR_N,SYNC_N,N,N,N,Y),
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VSETVL-> List(VEC_Y,N,Y,BR_N, N,Y,A2_ZERO, DW_XPR,FN_ADD, N,M_X, MT_X, N,MUL_X, N,DIV_X, Y,WA_RD,WB_ALU,PCR_N,SYNC_N,N,N,N,Y),
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VF-> List(VEC_Y,Y,BR_N, REN_N,REN_Y,A2_ITYPE,DW_XPR,FN_ADD, M_N,M_X, MT_X, N,MUL_X, N,DIV_X, WEN_N,WA_X, WB_ALU,PCR_N,SYNC_N,N,N,N,N),
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VF-> List(VEC_Y,N,Y,BR_N, N,Y,A2_ITYPE,DW_XPR,FN_ADD, N,M_X, MT_X, N,MUL_X, N,DIV_X, N,WA_X, WB_ALU,PCR_N,SYNC_N,N,N,N,N),
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VMVV-> List(VEC_Y,Y,BR_N, REN_N,REN_N,A2_X, DW_X, FN_X, M_N,M_X, MT_X, N,MUL_X, N,DIV_X, WEN_N,WA_RD,WB_X, PCR_N,SYNC_N,N,N,N,N),
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VMVV-> List(VEC_Y,N,Y,BR_N, N,N,A2_X, DW_X, FN_X, N,M_X, MT_X, N,MUL_X, N,DIV_X, N,WA_RD,WB_X, PCR_N,SYNC_N,N,N,N,N),
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VMSV-> List(VEC_Y,Y,BR_N, REN_N,REN_Y,A2_ZERO, DW_XPR,FN_ADD, M_N,M_X, MT_X, N,MUL_X, N,DIV_X, WEN_N,WA_RD,WB_ALU,PCR_N,SYNC_N,N,N,N,N),
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VMSV-> List(VEC_Y,N,Y,BR_N, N,Y,A2_ZERO, DW_XPR,FN_ADD, N,M_X, MT_X, N,MUL_X, N,DIV_X, N,WA_RD,WB_ALU,PCR_N,SYNC_N,N,N,N,N),
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VFMVV-> List(VEC_Y,Y,BR_N, REN_N,REN_N,A2_X, DW_X, FN_X, M_N,M_X, MT_X, N,MUL_X, N,DIV_X, WEN_N,WA_RD,WB_X, PCR_N,SYNC_N,N,N,N,N),
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VFMVV-> List(VEC_Y,N,Y,BR_N, N,N,A2_X, DW_X, FN_X, N,M_X, MT_X, N,MUL_X, N,DIV_X, N,WA_RD,WB_X, PCR_N,SYNC_N,N,N,N,N),
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FENCE_V_L-> List(VEC_Y,Y,BR_N, REN_N,REN_N,A2_X, DW_X, FN_X, M_N,M_X, MT_X, N,MUL_X, N,DIV_X, WEN_N,WA_X, WB_X, PCR_N,SYNC_N,N,N,N,N),
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FENCE_V_L-> List(VEC_Y,N,Y,BR_N, N,N,A2_X, DW_X, FN_X, N,M_X, MT_X, N,MUL_X, N,DIV_X, N,WA_X, WB_X, PCR_N,SYNC_N,N,N,N,N),
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FENCE_V_G-> List(VEC_Y,Y,BR_N, REN_N,REN_N,A2_X, DW_X, FN_X, M_N,M_X, MT_X, N,MUL_X, N,DIV_X, WEN_N,WA_X, WB_X, PCR_N,SYNC_D,N,N,N,N),
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FENCE_V_G-> List(VEC_Y,N,Y,BR_N, N,N,A2_X, DW_X, FN_X, N,M_X, MT_X, N,MUL_X, N,DIV_X, N,WA_X, WB_X, PCR_N,SYNC_D,N,N,N,N),
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VLD-> List(VEC_Y,Y,BR_N, REN_N,REN_Y,A2_ZERO, DW_XPR,FN_ADD, M_N,M_X, MT_X, N,MUL_X, N,DIV_X, WEN_N,WA_RD,WB_ALU,PCR_N,SYNC_N,N,N,N,N),
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VLD-> List(VEC_Y,N,Y,BR_N, N,Y,A2_ZERO, DW_XPR,FN_ADD, N,M_X, MT_X, N,MUL_X, N,DIV_X, N,WA_RD,WB_ALU,PCR_N,SYNC_N,N,N,N,N),
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VLW-> List(VEC_Y,Y,BR_N, REN_N,REN_Y,A2_ZERO, DW_XPR,FN_ADD, M_N,M_X, MT_X, N,MUL_X, N,DIV_X, WEN_N,WA_RD,WB_ALU,PCR_N,SYNC_N,N,N,N,N),
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VLW-> List(VEC_Y,N,Y,BR_N, N,Y,A2_ZERO, DW_XPR,FN_ADD, N,M_X, MT_X, N,MUL_X, N,DIV_X, N,WA_RD,WB_ALU,PCR_N,SYNC_N,N,N,N,N),
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VLWU-> List(VEC_Y,Y,BR_N, REN_N,REN_Y,A2_ZERO, DW_XPR,FN_ADD, M_N,M_X, MT_X, N,MUL_X, N,DIV_X, WEN_N,WA_RD,WB_ALU,PCR_N,SYNC_N,N,N,N,N),
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VLWU-> List(VEC_Y,N,Y,BR_N, N,Y,A2_ZERO, DW_XPR,FN_ADD, N,M_X, MT_X, N,MUL_X, N,DIV_X, N,WA_RD,WB_ALU,PCR_N,SYNC_N,N,N,N,N),
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VLH-> List(VEC_Y,Y,BR_N, REN_N,REN_Y,A2_ZERO, DW_XPR,FN_ADD, M_N,M_X, MT_X, N,MUL_X, N,DIV_X, WEN_N,WA_RD,WB_ALU,PCR_N,SYNC_N,N,N,N,N),
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VLH-> List(VEC_Y,N,Y,BR_N, N,Y,A2_ZERO, DW_XPR,FN_ADD, N,M_X, MT_X, N,MUL_X, N,DIV_X, N,WA_RD,WB_ALU,PCR_N,SYNC_N,N,N,N,N),
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VLHU-> List(VEC_Y,Y,BR_N, REN_N,REN_Y,A2_ZERO, DW_XPR,FN_ADD, M_N,M_X, MT_X, N,MUL_X, N,DIV_X, WEN_N,WA_RD,WB_ALU,PCR_N,SYNC_N,N,N,N,N),
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VLHU-> List(VEC_Y,N,Y,BR_N, N,Y,A2_ZERO, DW_XPR,FN_ADD, N,M_X, MT_X, N,MUL_X, N,DIV_X, N,WA_RD,WB_ALU,PCR_N,SYNC_N,N,N,N,N),
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VLB-> List(VEC_Y,Y,BR_N, REN_N,REN_Y,A2_ZERO, DW_XPR,FN_ADD, M_N,M_X, MT_X, N,MUL_X, N,DIV_X, WEN_N,WA_RD,WB_ALU,PCR_N,SYNC_N,N,N,N,N),
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VLB-> List(VEC_Y,N,Y,BR_N, N,Y,A2_ZERO, DW_XPR,FN_ADD, N,M_X, MT_X, N,MUL_X, N,DIV_X, N,WA_RD,WB_ALU,PCR_N,SYNC_N,N,N,N,N),
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VLBU-> List(VEC_Y,Y,BR_N, REN_N,REN_Y,A2_ZERO, DW_XPR,FN_ADD, M_N,M_X, MT_X, N,MUL_X, N,DIV_X, WEN_N,WA_RD,WB_ALU,PCR_N,SYNC_N,N,N,N,N),
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VLBU-> List(VEC_Y,N,Y,BR_N, N,Y,A2_ZERO, DW_XPR,FN_ADD, N,M_X, MT_X, N,MUL_X, N,DIV_X, N,WA_RD,WB_ALU,PCR_N,SYNC_N,N,N,N,N),
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VSD-> List(VEC_Y,Y,BR_N, REN_N,REN_Y,A2_ZERO, DW_XPR,FN_ADD, M_N,M_X, MT_X, N,MUL_X, N,DIV_X, WEN_N,WA_RD,WB_ALU,PCR_N,SYNC_N,N,N,N,N),
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VSD-> List(VEC_Y,N,Y,BR_N, N,Y,A2_ZERO, DW_XPR,FN_ADD, N,M_X, MT_X, N,MUL_X, N,DIV_X, N,WA_RD,WB_ALU,PCR_N,SYNC_N,N,N,N,N),
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VSW-> List(VEC_Y,Y,BR_N, REN_N,REN_Y,A2_ZERO, DW_XPR,FN_ADD, M_N,M_X, MT_X, N,MUL_X, N,DIV_X, WEN_N,WA_RD,WB_ALU,PCR_N,SYNC_N,N,N,N,N),
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VSW-> List(VEC_Y,N,Y,BR_N, N,Y,A2_ZERO, DW_XPR,FN_ADD, N,M_X, MT_X, N,MUL_X, N,DIV_X, N,WA_RD,WB_ALU,PCR_N,SYNC_N,N,N,N,N),
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VSH-> List(VEC_Y,Y,BR_N, REN_N,REN_Y,A2_ZERO, DW_XPR,FN_ADD, M_N,M_X, MT_X, N,MUL_X, N,DIV_X, WEN_N,WA_RD,WB_ALU,PCR_N,SYNC_N,N,N,N,N),
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VSH-> List(VEC_Y,N,Y,BR_N, N,Y,A2_ZERO, DW_XPR,FN_ADD, N,M_X, MT_X, N,MUL_X, N,DIV_X, N,WA_RD,WB_ALU,PCR_N,SYNC_N,N,N,N,N),
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VSB-> List(VEC_Y,Y,BR_N, REN_N,REN_Y,A2_ZERO, DW_XPR,FN_ADD, M_N,M_X, MT_X, N,MUL_X, N,DIV_X, WEN_N,WA_RD,WB_ALU,PCR_N,SYNC_N,N,N,N,N),
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VSB-> List(VEC_Y,N,Y,BR_N, N,Y,A2_ZERO, DW_XPR,FN_ADD, N,M_X, MT_X, N,MUL_X, N,DIV_X, N,WA_RD,WB_ALU,PCR_N,SYNC_N,N,N,N,N),
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VFLD-> List(VEC_Y,Y,BR_N, REN_N,REN_Y,A2_ZERO, DW_XPR,FN_ADD, M_N,M_X, MT_X, N,MUL_X, N,DIV_X, WEN_N,WA_RD,WB_ALU,PCR_N,SYNC_N,N,N,N,N),
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VFLD-> List(VEC_Y,N,Y,BR_N, N,Y,A2_ZERO, DW_XPR,FN_ADD, N,M_X, MT_X, N,MUL_X, N,DIV_X, N,WA_RD,WB_ALU,PCR_N,SYNC_N,N,N,N,N),
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VFLW-> List(VEC_Y,Y,BR_N, REN_N,REN_Y,A2_ZERO, DW_XPR,FN_ADD, M_N,M_X, MT_X, N,MUL_X, N,DIV_X, WEN_N,WA_RD,WB_ALU,PCR_N,SYNC_N,N,N,N,N),
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VFLW-> List(VEC_Y,N,Y,BR_N, N,Y,A2_ZERO, DW_XPR,FN_ADD, N,M_X, MT_X, N,MUL_X, N,DIV_X, N,WA_RD,WB_ALU,PCR_N,SYNC_N,N,N,N,N),
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VFSD-> List(VEC_Y,Y,BR_N, REN_N,REN_Y,A2_ZERO, DW_XPR,FN_ADD, M_N,M_X, MT_X, N,MUL_X, N,DIV_X, WEN_N,WA_RD,WB_ALU,PCR_N,SYNC_N,N,N,N,N),
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VFSD-> List(VEC_Y,N,Y,BR_N, N,Y,A2_ZERO, DW_XPR,FN_ADD, N,M_X, MT_X, N,MUL_X, N,DIV_X, N,WA_RD,WB_ALU,PCR_N,SYNC_N,N,N,N,N),
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VFSW-> List(VEC_Y,Y,BR_N, REN_N,REN_Y,A2_ZERO, DW_XPR,FN_ADD, M_N,M_X, MT_X, N,MUL_X, N,DIV_X, WEN_N,WA_RD,WB_ALU,PCR_N,SYNC_N,N,N,N,N),
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VFSW-> List(VEC_Y,N,Y,BR_N, N,Y,A2_ZERO, DW_XPR,FN_ADD, N,M_X, MT_X, N,MUL_X, N,DIV_X, N,WA_RD,WB_ALU,PCR_N,SYNC_N,N,N,N,N),
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VLSTD-> List(VEC_Y,Y,BR_N, REN_Y,REN_Y,A2_ZERO, DW_XPR,FN_ADD, M_N,M_X, MT_D, N,MUL_X, N,DIV_X, WEN_N,WA_RD,WB_ALU,PCR_N,SYNC_N,N,N,N,N),
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VLSTD-> List(VEC_Y,N,Y,BR_N, Y,Y,A2_ZERO, DW_XPR,FN_ADD, N,M_X, MT_D, N,MUL_X, N,DIV_X, N,WA_RD,WB_ALU,PCR_N,SYNC_N,N,N,N,N),
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VLSTW-> List(VEC_Y,Y,BR_N, REN_Y,REN_Y,A2_ZERO, DW_XPR,FN_ADD, M_N,M_X, MT_D, N,MUL_X, N,DIV_X, WEN_N,WA_RD,WB_ALU,PCR_N,SYNC_N,N,N,N,N),
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VLSTW-> List(VEC_Y,N,Y,BR_N, Y,Y,A2_ZERO, DW_XPR,FN_ADD, N,M_X, MT_D, N,MUL_X, N,DIV_X, N,WA_RD,WB_ALU,PCR_N,SYNC_N,N,N,N,N),
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VLSTWU-> List(VEC_Y,Y,BR_N, REN_Y,REN_Y,A2_ZERO, DW_XPR,FN_ADD, M_N,M_X, MT_D, N,MUL_X, N,DIV_X, WEN_N,WA_RD,WB_ALU,PCR_N,SYNC_N,N,N,N,N),
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VLSTWU-> List(VEC_Y,N,Y,BR_N, Y,Y,A2_ZERO, DW_XPR,FN_ADD, N,M_X, MT_D, N,MUL_X, N,DIV_X, N,WA_RD,WB_ALU,PCR_N,SYNC_N,N,N,N,N),
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VLSTH-> List(VEC_Y,Y,BR_N, REN_Y,REN_Y,A2_ZERO, DW_XPR,FN_ADD, M_N,M_X, MT_D, N,MUL_X, N,DIV_X, WEN_N,WA_RD,WB_ALU,PCR_N,SYNC_N,N,N,N,N),
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VLSTH-> List(VEC_Y,N,Y,BR_N, Y,Y,A2_ZERO, DW_XPR,FN_ADD, N,M_X, MT_D, N,MUL_X, N,DIV_X, N,WA_RD,WB_ALU,PCR_N,SYNC_N,N,N,N,N),
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VLSTHU-> List(VEC_Y,Y,BR_N, REN_Y,REN_Y,A2_ZERO, DW_XPR,FN_ADD, M_N,M_X, MT_D, N,MUL_X, N,DIV_X, WEN_N,WA_RD,WB_ALU,PCR_N,SYNC_N,N,N,N,N),
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VLSTHU-> List(VEC_Y,N,Y,BR_N, Y,Y,A2_ZERO, DW_XPR,FN_ADD, N,M_X, MT_D, N,MUL_X, N,DIV_X, N,WA_RD,WB_ALU,PCR_N,SYNC_N,N,N,N,N),
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VLSTB-> List(VEC_Y,Y,BR_N, REN_Y,REN_Y,A2_ZERO, DW_XPR,FN_ADD, M_N,M_X, MT_D, N,MUL_X, N,DIV_X, WEN_N,WA_RD,WB_ALU,PCR_N,SYNC_N,N,N,N,N),
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VLSTB-> List(VEC_Y,N,Y,BR_N, Y,Y,A2_ZERO, DW_XPR,FN_ADD, N,M_X, MT_D, N,MUL_X, N,DIV_X, N,WA_RD,WB_ALU,PCR_N,SYNC_N,N,N,N,N),
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VLSTBU-> List(VEC_Y,Y,BR_N, REN_Y,REN_Y,A2_ZERO, DW_XPR,FN_ADD, M_N,M_X, MT_D, N,MUL_X, N,DIV_X, WEN_N,WA_RD,WB_ALU,PCR_N,SYNC_N,N,N,N,N),
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VLSTBU-> List(VEC_Y,N,Y,BR_N, Y,Y,A2_ZERO, DW_XPR,FN_ADD, N,M_X, MT_D, N,MUL_X, N,DIV_X, N,WA_RD,WB_ALU,PCR_N,SYNC_N,N,N,N,N),
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VSSTD-> List(VEC_Y,Y,BR_N, REN_Y,REN_Y,A2_ZERO, DW_XPR,FN_ADD, M_N,M_X, MT_D, N,MUL_X, N,DIV_X, WEN_N,WA_RD,WB_ALU,PCR_N,SYNC_N,N,N,N,N),
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VSSTD-> List(VEC_Y,N,Y,BR_N, Y,Y,A2_ZERO, DW_XPR,FN_ADD, N,M_X, MT_D, N,MUL_X, N,DIV_X, N,WA_RD,WB_ALU,PCR_N,SYNC_N,N,N,N,N),
|
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VSSTW-> List(VEC_Y,Y,BR_N, REN_Y,REN_Y,A2_ZERO, DW_XPR,FN_ADD, M_N,M_X, MT_D, N,MUL_X, N,DIV_X, WEN_N,WA_RD,WB_ALU,PCR_N,SYNC_N,N,N,N,N),
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VSSTW-> List(VEC_Y,N,Y,BR_N, Y,Y,A2_ZERO, DW_XPR,FN_ADD, N,M_X, MT_D, N,MUL_X, N,DIV_X, N,WA_RD,WB_ALU,PCR_N,SYNC_N,N,N,N,N),
|
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VSSTH-> List(VEC_Y,Y,BR_N, REN_Y,REN_Y,A2_ZERO, DW_XPR,FN_ADD, M_N,M_X, MT_D, N,MUL_X, N,DIV_X, WEN_N,WA_RD,WB_ALU,PCR_N,SYNC_N,N,N,N,N),
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VSSTH-> List(VEC_Y,N,Y,BR_N, Y,Y,A2_ZERO, DW_XPR,FN_ADD, N,M_X, MT_D, N,MUL_X, N,DIV_X, N,WA_RD,WB_ALU,PCR_N,SYNC_N,N,N,N,N),
|
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VSSTB-> List(VEC_Y,Y,BR_N, REN_Y,REN_Y,A2_ZERO, DW_XPR,FN_ADD, M_N,M_X, MT_D, N,MUL_X, N,DIV_X, WEN_N,WA_RD,WB_ALU,PCR_N,SYNC_N,N,N,N,N),
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VSSTB-> List(VEC_Y,N,Y,BR_N, Y,Y,A2_ZERO, DW_XPR,FN_ADD, N,M_X, MT_D, N,MUL_X, N,DIV_X, N,WA_RD,WB_ALU,PCR_N,SYNC_N,N,N,N,N),
|
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VFLSTD-> List(VEC_Y,Y,BR_N, REN_Y,REN_Y,A2_ZERO, DW_XPR,FN_ADD, M_N,M_X, MT_D, N,MUL_X, N,DIV_X, WEN_N,WA_RD,WB_ALU,PCR_N,SYNC_N,N,N,N,N),
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VFLSTD-> List(VEC_Y,N,Y,BR_N, Y,Y,A2_ZERO, DW_XPR,FN_ADD, N,M_X, MT_D, N,MUL_X, N,DIV_X, N,WA_RD,WB_ALU,PCR_N,SYNC_N,N,N,N,N),
|
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VFLSTW-> List(VEC_Y,Y,BR_N, REN_Y,REN_Y,A2_ZERO, DW_XPR,FN_ADD, M_N,M_X, MT_D, N,MUL_X, N,DIV_X, WEN_N,WA_RD,WB_ALU,PCR_N,SYNC_N,N,N,N,N),
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VFLSTW-> List(VEC_Y,N,Y,BR_N, Y,Y,A2_ZERO, DW_XPR,FN_ADD, N,M_X, MT_D, N,MUL_X, N,DIV_X, N,WA_RD,WB_ALU,PCR_N,SYNC_N,N,N,N,N),
|
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VFSSTD-> List(VEC_Y,Y,BR_N, REN_Y,REN_Y,A2_ZERO, DW_XPR,FN_ADD, M_N,M_X, MT_D, N,MUL_X, N,DIV_X, WEN_N,WA_RD,WB_ALU,PCR_N,SYNC_N,N,N,N,N),
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VFSSTD-> List(VEC_Y,N,Y,BR_N, Y,Y,A2_ZERO, DW_XPR,FN_ADD, N,M_X, MT_D, N,MUL_X, N,DIV_X, N,WA_RD,WB_ALU,PCR_N,SYNC_N,N,N,N,N),
|
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VFSSTW-> List(VEC_Y,Y,BR_N, REN_Y,REN_Y,A2_ZERO, DW_XPR,FN_ADD, M_N,M_X, MT_D, N,MUL_X, N,DIV_X, WEN_N,WA_RD,WB_ALU,PCR_N,SYNC_N,N,N,N,N),
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VFSSTW-> List(VEC_Y,N,Y,BR_N, Y,Y,A2_ZERO, DW_XPR,FN_ADD, N,M_X, MT_D, N,MUL_X, N,DIV_X, N,WA_RD,WB_ALU,PCR_N,SYNC_N,N,N,N,N),
|
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VENQCMD-> List(VEC_Y,Y,BR_N, REN_Y,REN_Y,A2_ZERO, DW_XPR,FN_ADD, M_N,M_X, MT_X, N,MUL_X, N,DIV_X, WEN_N,WA_RD,WB_ALU,PCR_N,SYNC_N,N,N,Y,N),
|
VENQCMD-> List(VEC_Y,N,Y,BR_N, Y,Y,A2_ZERO, DW_XPR,FN_ADD, N,M_X, MT_X, N,MUL_X, N,DIV_X, N,WA_RD,WB_ALU,PCR_N,SYNC_N,N,N,Y,N),
|
||||||
VENQIMM1-> List(VEC_Y,Y,BR_N, REN_Y,REN_Y,A2_ZERO, DW_XPR,FN_ADD, M_N,M_X, MT_X, N,MUL_X, N,DIV_X, WEN_N,WA_RD,WB_ALU,PCR_N,SYNC_N,N,N,Y,N),
|
VENQIMM1-> List(VEC_Y,N,Y,BR_N, Y,Y,A2_ZERO, DW_XPR,FN_ADD, N,M_X, MT_X, N,MUL_X, N,DIV_X, N,WA_RD,WB_ALU,PCR_N,SYNC_N,N,N,Y,N),
|
||||||
VENQIMM2-> List(VEC_Y,Y,BR_N, REN_Y,REN_Y,A2_ZERO, DW_XPR,FN_ADD, M_N,M_X, MT_X, N,MUL_X, N,DIV_X, WEN_N,WA_RD,WB_ALU,PCR_N,SYNC_N,N,N,Y,N),
|
VENQIMM2-> List(VEC_Y,N,Y,BR_N, Y,Y,A2_ZERO, DW_XPR,FN_ADD, N,M_X, MT_X, N,MUL_X, N,DIV_X, N,WA_RD,WB_ALU,PCR_N,SYNC_N,N,N,Y,N),
|
||||||
VENQCNT-> List(VEC_Y,Y,BR_N, REN_Y,REN_Y,A2_ZERO, DW_XPR,FN_ADD, M_N,M_X, MT_X, N,MUL_X, N,DIV_X, WEN_N,WA_RD,WB_ALU,PCR_N,SYNC_N,N,N,Y,N),
|
VENQCNT-> List(VEC_Y,N,Y,BR_N, Y,Y,A2_ZERO, DW_XPR,FN_ADD, N,M_X, MT_X, N,MUL_X, N,DIV_X, N,WA_RD,WB_ALU,PCR_N,SYNC_N,N,N,Y,N),
|
||||||
VXCPTEVAC-> List(VEC_Y,Y,BR_N, REN_N,REN_Y,A2_ZERO, DW_XPR,FN_ADD, M_N,M_X, MT_X, N,MUL_X, N,DIV_X, WEN_N,WA_RD,WB_ALU,PCR_N,SYNC_N,N,N,Y,N),
|
VXCPTEVAC-> List(VEC_Y,N,Y,BR_N, N,Y,A2_ZERO, DW_XPR,FN_ADD, N,M_X, MT_X, N,MUL_X, N,DIV_X, N,WA_RD,WB_ALU,PCR_N,SYNC_N,N,N,Y,N),
|
||||||
VXCPTKILL-> List(VEC_Y,Y,BR_N, REN_N,REN_N,A2_X, DW_X, FN_X, M_N,M_X, MT_X, N,MUL_X, N,DIV_X, WEN_N,WA_X, WB_X, PCR_N,SYNC_N,N,N,Y,N),
|
VXCPTKILL-> List(VEC_Y,N,Y,BR_N, N,N,A2_X, DW_X, FN_X, N,M_X, MT_X, N,MUL_X, N,DIV_X, N,WA_X, WB_X, PCR_N,SYNC_N,N,N,Y,N),
|
||||||
VXCPTHOLD-> List(VEC_Y,Y,BR_N, REN_N,REN_N,A2_X, DW_X, FN_X, M_N,M_X, MT_X, N,MUL_X, N,DIV_X, WEN_N,WA_X, WB_X, PCR_N,SYNC_N,N,N,Y,N))
|
VXCPTHOLD-> List(VEC_Y,N,Y,BR_N, N,N,A2_X, DW_X, FN_X, N,M_X, MT_X, N,MUL_X, N,DIV_X, N,WA_X, WB_X, PCR_N,SYNC_N,N,N,Y,N))
|
||||||
}
|
}
|
||||||
|
|
||||||
class rocketCtrl extends Component
|
class rocketCtrl extends Component
|
||||||
@ -311,9 +337,9 @@ class rocketCtrl extends Component
|
|||||||
if (HAVE_FPU) decode_table ++= rocketCtrlDecode.fdecode
|
if (HAVE_FPU) decode_table ++= rocketCtrlDecode.fdecode
|
||||||
if (HAVE_VEC) decode_table ++= rocketCtrlDecode.vdecode
|
if (HAVE_VEC) decode_table ++= rocketCtrlDecode.vdecode
|
||||||
|
|
||||||
val cs = ListLookup(io.dpath.inst, rocketCtrlDecode.decode_default, decode_table)
|
val cs = DecodeLogic(io.dpath.inst, rocketCtrlDecode.decode_default, decode_table)
|
||||||
|
|
||||||
val id_int_val :: id_vec_val :: id_br_type :: id_renx2 :: id_renx1 :: id_sel_alu2 :: id_fn_dw :: id_fn_alu :: cs0 = cs
|
val id_int_val :: id_fp_val :: id_vec_val :: id_br_type :: id_renx2 :: id_renx1 :: id_sel_alu2 :: id_fn_dw :: id_fn_alu :: cs0 = cs
|
||||||
val id_mem_val :: id_mem_cmd :: id_mem_type :: id_mul_val :: id_mul_fn :: id_div_val :: id_div_fn :: id_wen :: id_sel_wa :: id_sel_wb :: cs1 = cs0
|
val id_mem_val :: id_mem_cmd :: id_mem_type :: id_mul_val :: id_mul_fn :: id_div_val :: id_div_fn :: id_wen :: id_sel_wa :: id_sel_wb :: cs1 = cs0
|
||||||
val id_pcr :: id_sync :: id_eret :: id_syscall :: id_privileged :: id_replay_next :: Nil = cs1
|
val id_pcr :: id_sync :: id_eret :: id_syscall :: id_privileged :: id_replay_next :: Nil = cs1
|
||||||
|
|
||||||
@ -335,12 +361,12 @@ class rocketCtrl extends Component
|
|||||||
val id_reg_replay = Reg(resetVal = Bool(false));
|
val id_reg_replay = Reg(resetVal = Bool(false));
|
||||||
val id_load_use = Wire(){Bool()};
|
val id_load_use = Wire(){Bool()};
|
||||||
|
|
||||||
val ex_reg_br_type = Reg(){UFix(width = 4)};
|
val ex_reg_br_type = Reg(){Bits()}
|
||||||
val ex_reg_btb_hit = Reg(){Bool()};
|
val ex_reg_btb_hit = Reg(){Bool()};
|
||||||
val ex_reg_div_val = Reg(){Bool()};
|
val ex_reg_div_val = Reg(){Bool()};
|
||||||
val ex_reg_mul_val = Reg(){Bool()};
|
val ex_reg_mul_val = Reg(){Bool()};
|
||||||
val ex_reg_mem_val = Reg(){Bool()};
|
val ex_reg_mem_val = Reg(){Bool()};
|
||||||
val ex_reg_mem_cmd = Reg(){UFix(width = 4)};
|
val ex_reg_mem_cmd = Reg(){Bits()};
|
||||||
val ex_reg_mem_type = Reg(){UFix(width = 3)};
|
val ex_reg_mem_type = Reg(){UFix(width = 3)};
|
||||||
val ex_reg_valid = Reg(resetVal = Bool(false));
|
val ex_reg_valid = Reg(resetVal = Bool(false));
|
||||||
val ex_reg_pcr = Reg(resetVal = PCR_N);
|
val ex_reg_pcr = Reg(resetVal = PCR_N);
|
||||||
@ -445,20 +471,18 @@ class rocketCtrl extends Component
|
|||||||
val mask_pfcntq_ready = !vec_dec.io.sigs.enq_pfcntq || io.vec_iface.vpfcntq_ready
|
val mask_pfcntq_ready = !vec_dec.io.sigs.enq_pfcntq || io.vec_iface.vpfcntq_ready
|
||||||
|
|
||||||
vec_stalld =
|
vec_stalld =
|
||||||
vec_dec.io.sigs.valid && (
|
id_vec_val && (
|
||||||
!mask_cmdq_ready || !mask_ximm1q_ready || !mask_ximm2q_ready || !mask_cntq_ready ||
|
!mask_cmdq_ready || !mask_ximm1q_ready || !mask_ximm2q_ready || !mask_cntq_ready ||
|
||||||
!mask_pfcmdq_ready || !mask_pfximm1q_ready || !mask_pfximm2q_ready || !mask_pfcntq_ready) ||
|
!mask_pfcmdq_ready || !mask_pfximm1q_ready || !mask_pfximm2q_ready || !mask_pfcntq_ready ||
|
||||||
id_vec_val && vec_dec.io.sigs.vfence && !vec.io.vfence_ready
|
vec_dec.io.sigs.vfence && !vec.io.vfence_ready)
|
||||||
|
|
||||||
vec_replay = vec.io.replay
|
vec_replay = vec.io.replay
|
||||||
vec_irq = vec.io.irq
|
vec_irq = vec.io.irq
|
||||||
vec_irq_cause = vec.io.irq_cause
|
vec_irq_cause = vec.io.irq_cause
|
||||||
}
|
}
|
||||||
|
|
||||||
// executing ERET when traps are enabled causes an illegal instruction exception (as per ISA sim)
|
// executing ERET when traps are enabled causes an illegal instruction exception
|
||||||
val illegal_inst =
|
val illegal_inst = !id_int_val.toBool || (id_eret.toBool && io.dpath.status(SR_ET))
|
||||||
!(id_int_val.toBool || io.fpu.dec.valid || id_vec_val.toBool) ||
|
|
||||||
(id_eret.toBool && io.dpath.status(SR_ET).toBool);
|
|
||||||
|
|
||||||
val p_irq_timer = (io.dpath.status(SR_IM+IRQ_TIMER).toBool && io.dpath.irq_timer);
|
val p_irq_timer = (io.dpath.status(SR_IM+IRQ_TIMER).toBool && io.dpath.irq_timer);
|
||||||
val p_irq_ipi = (io.dpath.status(SR_IM+IRQ_IPI).toBool && io.dpath.irq_ipi);
|
val p_irq_ipi = (io.dpath.status(SR_IM+IRQ_IPI).toBool && io.dpath.irq_ipi);
|
||||||
@ -504,7 +528,7 @@ class rocketCtrl extends Component
|
|||||||
ex_reg_valid := id_reg_valid
|
ex_reg_valid := id_reg_valid
|
||||||
ex_reg_pcr := id_pcr
|
ex_reg_pcr := id_pcr
|
||||||
ex_reg_wen := id_wen.toBool && id_waddr != UFix(0);
|
ex_reg_wen := id_wen.toBool && id_waddr != UFix(0);
|
||||||
ex_reg_fp_wen := io.fpu.dec.wen;
|
ex_reg_fp_wen := id_fp_val && io.fpu.dec.wen
|
||||||
ex_reg_eret := id_eret.toBool;
|
ex_reg_eret := id_eret.toBool;
|
||||||
ex_reg_flush_inst := (id_sync === SYNC_I);
|
ex_reg_flush_inst := (id_sync === SYNC_I);
|
||||||
ex_reg_xcpt_ma_inst := id_reg_xcpt_ma_inst;
|
ex_reg_xcpt_ma_inst := id_reg_xcpt_ma_inst;
|
||||||
@ -512,7 +536,7 @@ class rocketCtrl extends Component
|
|||||||
ex_reg_xcpt_illegal := illegal_inst;
|
ex_reg_xcpt_illegal := illegal_inst;
|
||||||
ex_reg_xcpt_privileged := (id_privileged & ~io.dpath.status(SR_S)).toBool;
|
ex_reg_xcpt_privileged := (id_privileged & ~io.dpath.status(SR_S)).toBool;
|
||||||
ex_reg_xcpt_syscall := id_syscall.toBool;
|
ex_reg_xcpt_syscall := id_syscall.toBool;
|
||||||
ex_reg_fp_val := io.fpu.dec.valid
|
ex_reg_fp_val := id_fp_val
|
||||||
ex_reg_fp_sboard_set := io.fpu.dec.sboard
|
ex_reg_fp_sboard_set := io.fpu.dec.sboard
|
||||||
ex_reg_vec_val := id_vec_val.toBool
|
ex_reg_vec_val := id_vec_val.toBool
|
||||||
ex_reg_replay := id_reg_replay
|
ex_reg_replay := id_reg_replay
|
||||||
@ -543,8 +567,8 @@ class rocketCtrl extends Component
|
|||||||
val mem_reg_div_mul_val = Reg(){Bool()};
|
val mem_reg_div_mul_val = Reg(){Bool()};
|
||||||
val mem_reg_eret = Reg(){Bool()};
|
val mem_reg_eret = Reg(){Bool()};
|
||||||
val mem_reg_mem_val = Reg(){Bool()};
|
val mem_reg_mem_val = Reg(){Bool()};
|
||||||
val mem_reg_mem_cmd = Reg(){UFix(width = 4)};
|
val mem_reg_mem_cmd = Reg(){Bits()}
|
||||||
val mem_reg_mem_type = Reg(){UFix(width = 3)};
|
val mem_reg_mem_type = Reg(){Bits()}
|
||||||
|
|
||||||
when (reset.toBool || io.dpath.killx) {
|
when (reset.toBool || io.dpath.killx) {
|
||||||
mem_reg_valid := Bool(false);
|
mem_reg_valid := Bool(false);
|
||||||
@ -792,7 +816,7 @@ class rocketCtrl extends Component
|
|||||||
(
|
(
|
||||||
id_ex_hazard || id_mem_hazard || id_wb_hazard ||
|
id_ex_hazard || id_mem_hazard || id_wb_hazard ||
|
||||||
id_stall_raddr1 || id_stall_raddr2 || id_stall_waddr ||
|
id_stall_raddr1 || id_stall_raddr2 || id_stall_waddr ||
|
||||||
id_stall_fpu ||
|
id_fp_val && id_stall_fpu ||
|
||||||
id_mem_val.toBool && !(io.dmem.req_rdy && io.dtlb_rdy) ||
|
id_mem_val.toBool && !(io.dmem.req_rdy && io.dtlb_rdy) ||
|
||||||
((id_sync === SYNC_D) || (id_sync === SYNC_I)) && !io.dmem.req_rdy ||
|
((id_sync === SYNC_D) || (id_sync === SYNC_I)) && !io.dmem.req_rdy ||
|
||||||
vec_stalld
|
vec_stalld
|
||||||
@ -813,12 +837,12 @@ class rocketCtrl extends Component
|
|||||||
io.dpath.mem_load := mem_reg_mem_val && mem_reg_wen
|
io.dpath.mem_load := mem_reg_mem_val && mem_reg_wen
|
||||||
io.dpath.ren2 := id_renx2.toBool;
|
io.dpath.ren2 := id_renx2.toBool;
|
||||||
io.dpath.ren1 := id_renx1.toBool;
|
io.dpath.ren1 := id_renx1.toBool;
|
||||||
io.dpath.sel_alu2 := id_sel_alu2
|
io.dpath.sel_alu2 := id_sel_alu2.toUFix
|
||||||
io.dpath.fn_dw := id_fn_dw.toBool;
|
io.dpath.fn_dw := id_fn_dw.toBool;
|
||||||
io.dpath.fn_alu := id_fn_alu;
|
io.dpath.fn_alu := id_fn_alu.toUFix
|
||||||
io.dpath.div_fn := id_div_fn;
|
io.dpath.div_fn := id_div_fn.toUFix
|
||||||
io.dpath.div_val := id_div_val.toBool && id_waddr != UFix(0);
|
io.dpath.div_val := id_div_val.toBool && id_waddr != UFix(0);
|
||||||
io.dpath.mul_fn := id_mul_fn;
|
io.dpath.mul_fn := id_mul_fn.toUFix
|
||||||
io.dpath.mul_val := id_mul_val.toBool && id_waddr != UFix(0);
|
io.dpath.mul_val := id_mul_val.toBool && id_waddr != UFix(0);
|
||||||
io.dpath.ex_fp_val:= ex_reg_fp_val;
|
io.dpath.ex_fp_val:= ex_reg_fp_val;
|
||||||
io.dpath.mem_fp_val:= mem_reg_fp_val;
|
io.dpath.mem_fp_val:= mem_reg_fp_val;
|
||||||
@ -827,13 +851,13 @@ class rocketCtrl extends Component
|
|||||||
io.dpath.wb_wen := wb_reg_wen;
|
io.dpath.wb_wen := wb_reg_wen;
|
||||||
io.dpath.wb_valid := wb_reg_valid && !vec_replay
|
io.dpath.wb_valid := wb_reg_valid && !vec_replay
|
||||||
io.dpath.sel_wa := id_sel_wa.toBool;
|
io.dpath.sel_wa := id_sel_wa.toBool;
|
||||||
io.dpath.sel_wb := id_sel_wb;
|
io.dpath.sel_wb := id_sel_wb.toUFix
|
||||||
io.dpath.pcr := wb_reg_pcr.toUFix
|
io.dpath.pcr := wb_reg_pcr.toUFix
|
||||||
io.dpath.id_eret := id_eret.toBool;
|
io.dpath.id_eret := id_eret.toBool;
|
||||||
io.dpath.wb_eret := wb_reg_eret;
|
io.dpath.wb_eret := wb_reg_eret;
|
||||||
io.dpath.ex_mem_type := ex_reg_mem_type
|
io.dpath.ex_mem_type := ex_reg_mem_type
|
||||||
|
|
||||||
io.fpu.valid := !io.dpath.killd && io.fpu.dec.valid
|
io.fpu.valid := !io.dpath.killd && id_fp_val
|
||||||
io.fpu.killx := kill_ex
|
io.fpu.killx := kill_ex
|
||||||
io.fpu.killm := kill_mem
|
io.fpu.killm := kill_mem
|
||||||
|
|
||||||
|
186
rocket/src/main/scala/decode.scala
Normal file
186
rocket/src/main/scala/decode.scala
Normal file
@ -0,0 +1,186 @@
|
|||||||
|
package rocket
|
||||||
|
|
||||||
|
import Chisel._
|
||||||
|
import Node._
|
||||||
|
|
||||||
|
object DecodeLogic
|
||||||
|
{
|
||||||
|
def term(b: Literal) = {
|
||||||
|
if (b.isZ) {
|
||||||
|
var (bits, mask, swidth) = Literal.parseLit(b.toString)
|
||||||
|
new Term(BigInt(bits, 2), BigInt(2).pow(b.width)-(BigInt(mask, 2)+1))
|
||||||
|
} else {
|
||||||
|
new Term(b.value)
|
||||||
|
}
|
||||||
|
}
|
||||||
|
def logic(addr: Bits, keys: Seq[Bits], cache: scala.collection.mutable.Map[Term,Bits], terms: Set[Term]) = {
|
||||||
|
terms.map { t =>
|
||||||
|
if (!cache.contains(t))
|
||||||
|
cache += t -> ((if (t.mask == 0) addr else addr & Lit(BigInt(2).pow(addr.width)-(t.mask+1), addr.width){Bits()}) === Lit(t.value, addr.width){Bits()})
|
||||||
|
cache(t)
|
||||||
|
}.foldLeft(Bool(false))(_||_)
|
||||||
|
}
|
||||||
|
def apply(addr: Bits, default: List[Bits], mapping: Array[(Bits, List[Bits])]) = {
|
||||||
|
var map = mapping
|
||||||
|
var cache = scala.collection.mutable.Map[Term,Bits]()
|
||||||
|
default map { d =>
|
||||||
|
val dlit = d.litOf
|
||||||
|
val dterm = term(dlit)
|
||||||
|
val (keys, values) = map.unzip
|
||||||
|
val keysterms = keys.map(k => term(k.litOf)) zip values.map(v => term(v.head.litOf))
|
||||||
|
|
||||||
|
val result = (0 until math.max(dlit.width, values.map(_.head.litOf.width).max)).map({ case (i: Int) =>
|
||||||
|
if (((dterm.mask >> i) & 1) != 0) {
|
||||||
|
var mint = keysterms.filter { case (k,t) => ((t.mask >> i) & 1) == 0 && ((t.value >> i) & 1) == 1 }.map(_._1).toSet
|
||||||
|
var maxt = keysterms.filter { case (k,t) => ((t.mask >> i) & 1) == 0 && ((t.value >> i) & 1) == 0 }.map(_._1).toSet
|
||||||
|
logic(addr, keys, cache, SimplifyDC(mint, maxt, addr.width)).toBits
|
||||||
|
} else {
|
||||||
|
val want = 1 - ((dterm.value.toInt >> i) & 1)
|
||||||
|
val mint = keysterms.filter { case (k,t) => ((t.mask >> i) & 1) == 0 && ((t.value >> i) & 1) == want }.map(_._1).toSet
|
||||||
|
val dc = keysterms.filter { case (k,t) => ((t.mask >> i) & 1) == 1 }.map(_._1).toSet
|
||||||
|
val bit = logic(addr, keys, cache, Simplify(mint, dc, addr.width)).toBits
|
||||||
|
if (want == 1) bit else ~bit
|
||||||
|
}
|
||||||
|
}).reverse.reduceRight(Cat(_,_))
|
||||||
|
map = map map { case (x,y) => (x, y.tail) }
|
||||||
|
result
|
||||||
|
}
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
class Term(val value: BigInt, val mask: BigInt = 0)
|
||||||
|
{
|
||||||
|
var prime = true
|
||||||
|
|
||||||
|
def covers(x: Term) = ((value ^ x.value) &~ mask) == 0
|
||||||
|
def intersects(x: Term) = ((value ^ x.value) &~ mask &~ x.mask) == 0
|
||||||
|
override def equals(that: Any) = that match {
|
||||||
|
case x: Term => x.value == value && x.mask == mask
|
||||||
|
case _ => false
|
||||||
|
}
|
||||||
|
override def hashCode = value.toInt
|
||||||
|
def similar(x: Term) = {
|
||||||
|
val diff = value - x.value
|
||||||
|
mask == x.mask && value > x.value && (diff & diff-1) == 0
|
||||||
|
}
|
||||||
|
def merge(x: Term) = {
|
||||||
|
prime = false
|
||||||
|
x.prime = false
|
||||||
|
val bit = value - x.value
|
||||||
|
new Term(value &~ bit, mask | bit)
|
||||||
|
}
|
||||||
|
|
||||||
|
override def toString = value.toString + "-" + mask + (if (prime) "p" else "")
|
||||||
|
}
|
||||||
|
|
||||||
|
object Simplify
|
||||||
|
{
|
||||||
|
def getPrimeImplicants(implicants: Set[Term], bits: Int) = {
|
||||||
|
var prime = Set[Term]()
|
||||||
|
implicants.foreach(_.prime = true)
|
||||||
|
val cols = (0 to bits).map(b => implicants.filter(b == _.mask.bitCount))
|
||||||
|
val table = cols.map(c => (0 to bits).map(b => collection.mutable.Set() ++ c.filter(b == _.value.bitCount)))
|
||||||
|
for (i <- 0 to bits) {
|
||||||
|
for (j <- 0 until bits-i)
|
||||||
|
table(i)(j).foreach(a => table(i+1)(j) ++= table(i)(j+1).filter(_.similar(a)).map(_.merge(a)))
|
||||||
|
prime ++= table(i).map(_.filter(_.prime)).reduceLeft(_++_)
|
||||||
|
}
|
||||||
|
prime
|
||||||
|
}
|
||||||
|
def getEssentialPrimeImplicants(prime: Set[Term], minterms: Set[Term]): Tuple3[Set[Term],Set[Term],Set[Term]] = {
|
||||||
|
val useful1 = prime.toSeq
|
||||||
|
for (i <- 0 until useful1.size) {
|
||||||
|
val icover = minterms.filter(useful1(i) covers _)
|
||||||
|
for (j <- 0 until useful1.size) {
|
||||||
|
val jcover = minterms.filter(useful1(j) covers _)
|
||||||
|
if (icover.size > jcover.size && jcover.forall(useful1(i) covers _))
|
||||||
|
return getEssentialPrimeImplicants(prime - useful1(j), minterms)
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
val essentiallyCovered = minterms.filter(t => prime.count(_ covers t) == 1)
|
||||||
|
val essential = prime.filter(p => essentiallyCovered.exists(p covers _))
|
||||||
|
val nonessential = prime -- essential
|
||||||
|
val uncovered = minterms.filterNot(t => essential.exists(_ covers t))
|
||||||
|
if (essential.isEmpty || uncovered.isEmpty)
|
||||||
|
(essential, nonessential, uncovered)
|
||||||
|
else {
|
||||||
|
val (a, b, c) = getEssentialPrimeImplicants(nonessential, uncovered)
|
||||||
|
(essential ++ a, b, c)
|
||||||
|
}
|
||||||
|
}
|
||||||
|
def getCost(cover: Set[Term], bits: Int) = cover.map(bits - _.mask.bitCount).sum
|
||||||
|
def getCover(implicants: Set[Term], minterms: Set[Term], bits: Int) = {
|
||||||
|
var cover = minterms.map(m => implicants.filter(_.covers(m)).map(i => Set(i))).toList
|
||||||
|
while (cover.size > 1)
|
||||||
|
cover = cover(0).map(a => cover(1).map(_ ++ a)).reduceLeft(_++_) :: cover.tail.tail
|
||||||
|
if (cover.isEmpty)
|
||||||
|
Set[Term]()
|
||||||
|
else
|
||||||
|
cover(0).reduceLeft((a, b) => if (getCost(a, bits) < getCost(b, bits)) a else b)
|
||||||
|
}
|
||||||
|
def stringify(s: Set[Term], bits: Int) = s.map(t => (0 until bits).map(i => if ((t.mask & (1 << i)) != 0) "x" else ((t.value >> i) & 1).toString).reduceLeft(_+_).reverse).reduceLeft(_+" + "+_)
|
||||||
|
|
||||||
|
def apply(minterms: Set[Term], dontcares: Set[Term], bits: Int) = {
|
||||||
|
val prime = getPrimeImplicants(minterms ++ dontcares, bits)
|
||||||
|
minterms.foreach(t => assert(prime.exists(_.covers(t))))
|
||||||
|
val (eprime, prime2, uncovered) = getEssentialPrimeImplicants(prime, minterms)
|
||||||
|
val cover = eprime ++ getCover(prime2, uncovered, bits)
|
||||||
|
minterms.foreach(t => assert(cover.exists(_.covers(t)))) // sanity check
|
||||||
|
cover
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
object SimplifyDC
|
||||||
|
{
|
||||||
|
def getImplicitDC(maxterms: Set[Term], term: Term, bits: Int, above: Boolean): Term = {
|
||||||
|
for (i <- 0 until bits) {
|
||||||
|
var t: Term = null
|
||||||
|
if (above && ((term.value | term.mask) & (1L << i)) == 0)
|
||||||
|
t = new Term(term.value | (1L << i), term.mask)
|
||||||
|
else if (!above && (term.value & (1L << i)) != 0)
|
||||||
|
t = new Term(term.value & ~(1L << i), term.mask)
|
||||||
|
if (t != null && !maxterms.exists(_.intersects(t)))
|
||||||
|
return t
|
||||||
|
}
|
||||||
|
null
|
||||||
|
}
|
||||||
|
def getPrimeImplicants(minterms: Set[Term], maxterms: Set[Term], bits: Int) = {
|
||||||
|
var prime = Set[Term]()
|
||||||
|
minterms.foreach(_.prime = true)
|
||||||
|
var mint = minterms.map(t => new Term(t.value, t.mask))
|
||||||
|
val cols = (0 to bits).map(b => mint.filter(b == _.mask.bitCount))
|
||||||
|
val table = cols.map(c => (0 to bits).map(b => collection.mutable.Set() ++ c.filter(b == _.value.bitCount)))
|
||||||
|
|
||||||
|
for (i <- 0 to bits) {
|
||||||
|
for (j <- 0 until bits-i) {
|
||||||
|
table(i)(j).foreach(a => table(i+1)(j) ++= table(i)(j+1).filter(_ similar a).map(_ merge a))
|
||||||
|
}
|
||||||
|
for (j <- 0 until bits-i) {
|
||||||
|
for (a <- table(i)(j).filter(_.prime)) {
|
||||||
|
val dc = getImplicitDC(maxterms, a, bits, true)
|
||||||
|
if (dc != null)
|
||||||
|
table(i+1)(j) += dc merge a
|
||||||
|
}
|
||||||
|
for (a <- table(i)(j+1).filter(_.prime)) {
|
||||||
|
val dc = getImplicitDC(maxterms, a, bits, false)
|
||||||
|
if (dc != null)
|
||||||
|
table(i+1)(j) += a merge dc
|
||||||
|
}
|
||||||
|
}
|
||||||
|
prime ++= table(i).map(_.filter(_.prime)).reduceLeft(_++_)
|
||||||
|
}
|
||||||
|
prime
|
||||||
|
}
|
||||||
|
|
||||||
|
def apply(minterms: Set[Term], maxterms: Set[Term], bits: Int) = {
|
||||||
|
val prime = getPrimeImplicants(minterms, maxterms, bits)
|
||||||
|
assert(minterms.forall(t => prime.exists(_ covers t)))
|
||||||
|
val (eprime, prime2, uncovered) = Simplify.getEssentialPrimeImplicants(prime, minterms)
|
||||||
|
assert(uncovered.forall(t => prime2.exists(_ covers t)))
|
||||||
|
val cover = eprime ++ Simplify.getCover(prime2, uncovered, bits)
|
||||||
|
minterms.foreach(t => assert(cover.exists(_.covers(t)))) // sanity check
|
||||||
|
maxterms.foreach(t => assert(!cover.exists(_.intersects(t)))) // sanity check
|
||||||
|
cover
|
||||||
|
}
|
||||||
|
}
|
@ -40,6 +40,7 @@ object rocketFPConstants
|
|||||||
val FCMD_NMADD = Bits("b100111")
|
val FCMD_NMADD = Bits("b100111")
|
||||||
val FCMD_LOAD = Bits("b111000")
|
val FCMD_LOAD = Bits("b111000")
|
||||||
val FCMD_STORE = Bits("b111001")
|
val FCMD_STORE = Bits("b111001")
|
||||||
|
val FCMD_X = Bits("b??????")
|
||||||
val FCMD_WIDTH = 6
|
val FCMD_WIDTH = 6
|
||||||
val FSR_WIDTH = 8
|
val FSR_WIDTH = 8
|
||||||
}
|
}
|
||||||
@ -48,7 +49,6 @@ import rocketFPConstants._
|
|||||||
class rocketFPUCtrlSigs extends Bundle
|
class rocketFPUCtrlSigs extends Bundle
|
||||||
{
|
{
|
||||||
val cmd = Bits(width = FCMD_WIDTH)
|
val cmd = Bits(width = FCMD_WIDTH)
|
||||||
val valid = Bool()
|
|
||||||
val wen = Bool()
|
val wen = Bool()
|
||||||
val sboard = Bool()
|
val sboard = Bool()
|
||||||
val ren1 = Bool()
|
val ren1 = Bool()
|
||||||
@ -74,71 +74,69 @@ class rocketFPUDecoder extends Component
|
|||||||
val N = Bool(false)
|
val N = Bool(false)
|
||||||
val Y = Bool(true)
|
val Y = Bool(true)
|
||||||
val X = Bool(false)
|
val X = Bool(false)
|
||||||
val FCMD_X = FCMD_ADD
|
|
||||||
val decoder = ListLookup(io.inst,
|
val decoder = ListLookup(io.inst,
|
||||||
List (N,FCMD_X, X,X,X,X,X,X,X,X,X,X,X,X,X),
|
List (FCMD_X, X,X,X,X,X,X,X,X,X,X,X,X,X),
|
||||||
Array(FLW -> List(Y,FCMD_LOAD, Y,N,N,N,N,Y,N,N,N,N,N,N,N),
|
Array(FLW -> List(FCMD_LOAD, Y,N,N,N,N,Y,N,N,N,N,N,N,N),
|
||||||
FLD -> List(Y,FCMD_LOAD, Y,N,N,N,N,N,N,N,N,N,N,N,N),
|
FLD -> List(FCMD_LOAD, Y,N,N,N,N,N,N,N,N,N,N,N,N),
|
||||||
FSW -> List(Y,FCMD_STORE, N,N,N,Y,N,Y,N,N,N,N,Y,N,N),
|
FSW -> List(FCMD_STORE, N,N,N,Y,N,Y,N,N,N,N,Y,N,N),
|
||||||
FSD -> List(Y,FCMD_STORE, N,N,N,Y,N,N,N,N,N,N,Y,N,N),
|
FSD -> List(FCMD_STORE, N,N,N,Y,N,N,N,N,N,N,Y,N,N),
|
||||||
MXTF_S -> List(Y,FCMD_MXTF, Y,N,N,N,N,Y,Y,N,Y,N,N,N,N),
|
MXTF_S -> List(FCMD_MXTF, Y,N,N,N,N,Y,Y,N,Y,N,N,N,N),
|
||||||
MXTF_D -> List(Y,FCMD_MXTF, Y,N,N,N,N,N,Y,N,Y,N,N,N,N),
|
MXTF_D -> List(FCMD_MXTF, Y,N,N,N,N,N,Y,N,Y,N,N,N,N),
|
||||||
FCVT_S_W -> List(Y,FCMD_CVT_FMT_W, Y,N,N,N,N,Y,Y,N,Y,N,N,N,N),
|
FCVT_S_W -> List(FCMD_CVT_FMT_W, Y,N,N,N,N,Y,Y,N,Y,N,N,N,N),
|
||||||
FCVT_S_WU-> List(Y,FCMD_CVT_FMT_WU,Y,N,N,N,N,Y,Y,N,Y,N,N,N,N),
|
FCVT_S_WU-> List(FCMD_CVT_FMT_WU,Y,N,N,N,N,Y,Y,N,Y,N,N,N,N),
|
||||||
FCVT_S_L -> List(Y,FCMD_CVT_FMT_L, Y,N,N,N,N,Y,Y,N,Y,N,N,N,N),
|
FCVT_S_L -> List(FCMD_CVT_FMT_L, Y,N,N,N,N,Y,Y,N,Y,N,N,N,N),
|
||||||
FCVT_S_LU-> List(Y,FCMD_CVT_FMT_LU,Y,N,N,N,N,Y,Y,N,Y,N,N,N,N),
|
FCVT_S_LU-> List(FCMD_CVT_FMT_LU,Y,N,N,N,N,Y,Y,N,Y,N,N,N,N),
|
||||||
FCVT_D_W -> List(Y,FCMD_CVT_FMT_W, Y,N,N,N,N,N,Y,N,Y,N,N,N,N),
|
FCVT_D_W -> List(FCMD_CVT_FMT_W, Y,N,N,N,N,N,Y,N,Y,N,N,N,N),
|
||||||
FCVT_D_WU-> List(Y,FCMD_CVT_FMT_WU,Y,N,N,N,N,N,Y,N,Y,N,N,N,N),
|
FCVT_D_WU-> List(FCMD_CVT_FMT_WU,Y,N,N,N,N,N,Y,N,Y,N,N,N,N),
|
||||||
FCVT_D_L -> List(Y,FCMD_CVT_FMT_L, Y,N,N,N,N,N,Y,N,Y,N,N,N,N),
|
FCVT_D_L -> List(FCMD_CVT_FMT_L, Y,N,N,N,N,N,Y,N,Y,N,N,N,N),
|
||||||
FCVT_D_LU-> List(Y,FCMD_CVT_FMT_LU,Y,N,N,N,N,N,Y,N,Y,N,N,N,N),
|
FCVT_D_LU-> List(FCMD_CVT_FMT_LU,Y,N,N,N,N,N,Y,N,Y,N,N,N,N),
|
||||||
MFTX_S -> List(Y,FCMD_MFTX, N,N,Y,N,N,Y,N,Y,N,N,N,N,N),
|
MFTX_S -> List(FCMD_MFTX, N,N,Y,N,N,Y,N,Y,N,N,N,N,N),
|
||||||
MFTX_D -> List(Y,FCMD_MFTX, N,N,Y,N,N,N,N,Y,N,N,N,N,N),
|
MFTX_D -> List(FCMD_MFTX, N,N,Y,N,N,N,N,Y,N,N,N,N,N),
|
||||||
FCVT_W_S -> List(Y,FCMD_CVT_W_FMT, N,N,Y,N,N,Y,N,Y,N,N,N,N,N),
|
FCVT_W_S -> List(FCMD_CVT_W_FMT, N,N,Y,N,N,Y,N,Y,N,N,N,N,N),
|
||||||
FCVT_WU_S-> List(Y,FCMD_CVT_WU_FMT,N,N,Y,N,N,Y,N,Y,N,N,N,N,N),
|
FCVT_WU_S-> List(FCMD_CVT_WU_FMT,N,N,Y,N,N,Y,N,Y,N,N,N,N,N),
|
||||||
FCVT_L_S -> List(Y,FCMD_CVT_L_FMT, N,N,Y,N,N,Y,N,Y,N,N,N,N,N),
|
FCVT_L_S -> List(FCMD_CVT_L_FMT, N,N,Y,N,N,Y,N,Y,N,N,N,N,N),
|
||||||
FCVT_LU_S-> List(Y,FCMD_CVT_LU_FMT,N,N,Y,N,N,Y,N,Y,N,N,N,N,N),
|
FCVT_LU_S-> List(FCMD_CVT_LU_FMT,N,N,Y,N,N,Y,N,Y,N,N,N,N,N),
|
||||||
FCVT_W_D -> List(Y,FCMD_CVT_W_FMT, N,N,Y,N,N,N,N,Y,N,N,N,N,N),
|
FCVT_W_D -> List(FCMD_CVT_W_FMT, N,N,Y,N,N,N,N,Y,N,N,N,N,N),
|
||||||
FCVT_WU_D-> List(Y,FCMD_CVT_WU_FMT,N,N,Y,N,N,N,N,Y,N,N,N,N,N),
|
FCVT_WU_D-> List(FCMD_CVT_WU_FMT,N,N,Y,N,N,N,N,Y,N,N,N,N,N),
|
||||||
FCVT_L_D -> List(Y,FCMD_CVT_L_FMT, N,N,Y,N,N,N,N,Y,N,N,N,N,N),
|
FCVT_L_D -> List(FCMD_CVT_L_FMT, N,N,Y,N,N,N,N,Y,N,N,N,N,N),
|
||||||
FCVT_LU_D-> List(Y,FCMD_CVT_LU_FMT,N,N,Y,N,N,N,N,Y,N,N,N,N,N),
|
FCVT_LU_D-> List(FCMD_CVT_LU_FMT,N,N,Y,N,N,N,N,Y,N,N,N,N,N),
|
||||||
FCVT_S_D -> List(Y,FCMD_CVT_FMT_D, Y,N,Y,N,N,Y,N,N,Y,N,N,N,N),
|
FCVT_S_D -> List(FCMD_CVT_FMT_D, Y,N,Y,N,N,Y,N,N,Y,N,N,N,N),
|
||||||
FCVT_D_S -> List(Y,FCMD_CVT_FMT_S, Y,N,Y,N,N,N,N,N,Y,N,N,N,N),
|
FCVT_D_S -> List(FCMD_CVT_FMT_S, Y,N,Y,N,N,N,N,N,Y,N,N,N,N),
|
||||||
FEQ_S -> List(Y,FCMD_EQ, N,N,Y,Y,N,Y,N,Y,N,N,N,N,N),
|
FEQ_S -> List(FCMD_EQ, N,N,Y,Y,N,Y,N,Y,N,N,N,N,N),
|
||||||
FLT_S -> List(Y,FCMD_LT, N,N,Y,Y,N,Y,N,Y,N,N,N,N,N),
|
FLT_S -> List(FCMD_LT, N,N,Y,Y,N,Y,N,Y,N,N,N,N,N),
|
||||||
FLE_S -> List(Y,FCMD_LE, N,N,Y,Y,N,Y,N,Y,N,N,N,N,N),
|
FLE_S -> List(FCMD_LE, N,N,Y,Y,N,Y,N,Y,N,N,N,N,N),
|
||||||
FEQ_D -> List(Y,FCMD_EQ, N,N,Y,Y,N,N,N,Y,N,N,N,N,N),
|
FEQ_D -> List(FCMD_EQ, N,N,Y,Y,N,N,N,Y,N,N,N,N,N),
|
||||||
FLT_D -> List(Y,FCMD_LT, N,N,Y,Y,N,N,N,Y,N,N,N,N,N),
|
FLT_D -> List(FCMD_LT, N,N,Y,Y,N,N,N,Y,N,N,N,N,N),
|
||||||
FLE_D -> List(Y,FCMD_LE, N,N,Y,Y,N,N,N,Y,N,N,N,N,N),
|
FLE_D -> List(FCMD_LE, N,N,Y,Y,N,N,N,Y,N,N,N,N,N),
|
||||||
MTFSR -> List(Y,FCMD_MTFSR, N,N,N,N,N,Y,N,Y,N,N,N,Y,Y),
|
MTFSR -> List(FCMD_MTFSR, N,N,N,N,N,Y,N,Y,N,N,N,Y,Y),
|
||||||
MFFSR -> List(Y,FCMD_MFFSR, N,N,N,N,N,Y,N,Y,N,N,N,Y,N),
|
MFFSR -> List(FCMD_MFFSR, N,N,N,N,N,Y,N,Y,N,N,N,Y,N),
|
||||||
FSGNJ_S -> List(Y,FCMD_SGNJ, Y,N,Y,Y,N,Y,N,N,Y,N,N,N,N),
|
FSGNJ_S -> List(FCMD_SGNJ, Y,N,Y,Y,N,Y,N,N,Y,N,N,N,N),
|
||||||
FSGNJN_S -> List(Y,FCMD_SGNJN, Y,N,Y,Y,N,Y,N,N,Y,N,N,N,N),
|
FSGNJN_S -> List(FCMD_SGNJN, Y,N,Y,Y,N,Y,N,N,Y,N,N,N,N),
|
||||||
FSGNJX_S -> List(Y,FCMD_SGNJX, Y,N,Y,Y,N,Y,N,N,Y,N,N,N,N),
|
FSGNJX_S -> List(FCMD_SGNJX, Y,N,Y,Y,N,Y,N,N,Y,N,N,N,N),
|
||||||
FSGNJ_D -> List(Y,FCMD_SGNJ, Y,N,Y,Y,N,N,N,N,Y,N,N,N,N),
|
FSGNJ_D -> List(FCMD_SGNJ, Y,N,Y,Y,N,N,N,N,Y,N,N,N,N),
|
||||||
FSGNJN_D -> List(Y,FCMD_SGNJN, Y,N,Y,Y,N,N,N,N,Y,N,N,N,N),
|
FSGNJN_D -> List(FCMD_SGNJN, Y,N,Y,Y,N,N,N,N,Y,N,N,N,N),
|
||||||
FSGNJX_D -> List(Y,FCMD_SGNJX, Y,N,Y,Y,N,N,N,N,Y,N,N,N,N),
|
FSGNJX_D -> List(FCMD_SGNJX, Y,N,Y,Y,N,N,N,N,Y,N,N,N,N),
|
||||||
FMIN_S -> List(Y,FCMD_MIN, Y,N,Y,Y,N,Y,N,N,Y,N,N,N,N),
|
FMIN_S -> List(FCMD_MIN, Y,N,Y,Y,N,Y,N,N,Y,N,N,N,N),
|
||||||
FMAX_S -> List(Y,FCMD_MAX, Y,N,Y,Y,N,Y,N,N,Y,N,N,N,N),
|
FMAX_S -> List(FCMD_MAX, Y,N,Y,Y,N,Y,N,N,Y,N,N,N,N),
|
||||||
FMIN_D -> List(Y,FCMD_MIN, Y,N,Y,Y,N,N,N,N,Y,N,N,N,N),
|
FMIN_D -> List(FCMD_MIN, Y,N,Y,Y,N,N,N,N,Y,N,N,N,N),
|
||||||
FMAX_D -> List(Y,FCMD_MAX, Y,N,Y,Y,N,N,N,N,Y,N,N,N,N),
|
FMAX_D -> List(FCMD_MAX, Y,N,Y,Y,N,N,N,N,Y,N,N,N,N),
|
||||||
FADD_S -> List(Y,FCMD_ADD, Y,Y,Y,Y,N,Y,N,N,N,Y,N,N,N),
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FADD_S -> List(FCMD_ADD, Y,Y,Y,Y,N,Y,N,N,N,Y,N,N,N),
|
||||||
FSUB_S -> List(Y,FCMD_SUB, Y,Y,Y,Y,N,Y,N,N,N,Y,N,N,N),
|
FSUB_S -> List(FCMD_SUB, Y,Y,Y,Y,N,Y,N,N,N,Y,N,N,N),
|
||||||
FMUL_S -> List(Y,FCMD_MUL, Y,Y,Y,Y,N,Y,N,N,N,Y,N,N,N),
|
FMUL_S -> List(FCMD_MUL, Y,Y,Y,Y,N,Y,N,N,N,Y,N,N,N),
|
||||||
FADD_D -> List(Y,FCMD_ADD, Y,Y,Y,Y,N,N,N,N,N,Y,N,N,N),
|
FADD_D -> List(FCMD_ADD, Y,Y,Y,Y,N,N,N,N,N,Y,N,N,N),
|
||||||
FSUB_D -> List(Y,FCMD_SUB, Y,Y,Y,Y,N,N,N,N,N,Y,N,N,N),
|
FSUB_D -> List(FCMD_SUB, Y,Y,Y,Y,N,N,N,N,N,Y,N,N,N),
|
||||||
FMUL_D -> List(Y,FCMD_MUL, Y,Y,Y,Y,N,N,N,N,N,Y,N,N,N),
|
FMUL_D -> List(FCMD_MUL, Y,Y,Y,Y,N,N,N,N,N,Y,N,N,N),
|
||||||
FMADD_S -> List(Y,FCMD_MADD, Y,Y,Y,Y,Y,Y,N,N,N,Y,N,N,N),
|
FMADD_S -> List(FCMD_MADD, Y,Y,Y,Y,Y,Y,N,N,N,Y,N,N,N),
|
||||||
FMSUB_S -> List(Y,FCMD_MSUB, Y,Y,Y,Y,Y,Y,N,N,N,Y,N,N,N),
|
FMSUB_S -> List(FCMD_MSUB, Y,Y,Y,Y,Y,Y,N,N,N,Y,N,N,N),
|
||||||
FNMADD_S -> List(Y,FCMD_NMADD, Y,Y,Y,Y,Y,Y,N,N,N,Y,N,N,N),
|
FNMADD_S -> List(FCMD_NMADD, Y,Y,Y,Y,Y,Y,N,N,N,Y,N,N,N),
|
||||||
FNMSUB_S -> List(Y,FCMD_NMSUB, Y,Y,Y,Y,Y,Y,N,N,N,Y,N,N,N),
|
FNMSUB_S -> List(FCMD_NMSUB, Y,Y,Y,Y,Y,Y,N,N,N,Y,N,N,N),
|
||||||
FMADD_D -> List(Y,FCMD_MADD, Y,Y,Y,Y,Y,N,N,N,N,Y,N,N,N),
|
FMADD_D -> List(FCMD_MADD, Y,Y,Y,Y,Y,N,N,N,N,Y,N,N,N),
|
||||||
FMSUB_D -> List(Y,FCMD_MSUB, Y,Y,Y,Y,Y,N,N,N,N,Y,N,N,N),
|
FMSUB_D -> List(FCMD_MSUB, Y,Y,Y,Y,Y,N,N,N,N,Y,N,N,N),
|
||||||
FNMADD_D -> List(Y,FCMD_NMADD, Y,Y,Y,Y,Y,N,N,N,N,Y,N,N,N),
|
FNMADD_D -> List(FCMD_NMADD, Y,Y,Y,Y,Y,N,N,N,N,Y,N,N,N),
|
||||||
FNMSUB_D -> List(Y,FCMD_NMSUB, Y,Y,Y,Y,Y,N,N,N,N,Y,N,N,N)
|
FNMSUB_D -> List(FCMD_NMSUB, Y,Y,Y,Y,Y,N,N,N,N,Y,N,N,N)
|
||||||
))
|
))
|
||||||
val valid :: cmd :: wen :: sboard :: ren1 :: ren2 :: ren3 :: single :: fromint :: toint :: fastpipe :: fma :: store :: rdfsr :: wrfsr :: Nil = decoder
|
val cmd :: wen :: sboard :: ren1 :: ren2 :: ren3 :: single :: fromint :: toint :: fastpipe :: fma :: store :: rdfsr :: wrfsr :: Nil = decoder
|
||||||
|
|
||||||
io.sigs.valid := valid.toBool
|
|
||||||
io.sigs.cmd := cmd
|
io.sigs.cmd := cmd
|
||||||
io.sigs.wen := wen.toBool
|
io.sigs.wen := wen.toBool
|
||||||
io.sigs.sboard := sboard.toBool
|
io.sigs.sboard := sboard.toBool
|
||||||
|
Loading…
Reference in New Issue
Block a user