From b0a06a77dbc2d02e65bccf7cf9f360a94e2bbc54 Mon Sep 17 00:00:00 2001 From: Howard Mao Date: Fri, 20 Nov 2015 13:33:15 -0800 Subject: [PATCH] fix a few Chisel3 compat issues --- rocket/src/main/scala/nbdcache.scala | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/rocket/src/main/scala/nbdcache.scala b/rocket/src/main/scala/nbdcache.scala index 52808e6e..296b7420 100644 --- a/rocket/src/main/scala/nbdcache.scala +++ b/rocket/src/main/scala/nbdcache.scala @@ -1079,7 +1079,7 @@ class SimpleHellaCacheIF(implicit p: Parameters) extends Module val cache = new HellaCacheIO } - val replaying_cmb = Bool() + val replaying_cmb = Wire(Bool()) val replaying = Reg(next = replaying_cmb, init = Bool(false)) replaying_cmb := replaying @@ -1099,10 +1099,10 @@ class SimpleHellaCacheIF(implicit p: Parameters) extends Module val s1_req_fire = Reg(next=s0_req_fire) val s2_req_fire = Reg(next=s1_req_fire) + io.cache.req <> req_arb.io.out io.cache.req.bits.kill := s2_nack io.cache.req.bits.phys := Bool(true) io.cache.req.bits.data := RegEnable(req_arb.io.out.bits.data, s0_req_fire) - io.cache.req <> req_arb.io.out /* replay queues: replayq1 holds the older request.