diff --git a/groundtest/src/main/scala/generator.scala b/groundtest/src/main/scala/generator.scala
index 7924e34c..158e36da 100644
--- a/groundtest/src/main/scala/generator.scala
+++ b/groundtest/src/main/scala/generator.scala
@@ -7,8 +7,7 @@ import rocket._
 import scala.util.Random
 import cde.{Parameters, Field}
 
-case object NGeneratorsPerTile extends Field[Int]
-case object NGeneratorTiles extends Field[Int]
+case object NGenerators extends Field[Int]
 case object GenerateUncached extends Field[Boolean]
 case object GenerateCached extends Field[Boolean]
 case object MaxGenerateRequests extends Field[Int]
@@ -16,9 +15,7 @@ case object GeneratorStartAddress extends Field[Int]
 
 trait HasGeneratorParams {
   implicit val p: Parameters
-  val nGensPerTile = p(NGeneratorsPerTile)
-  val nGenTiles = p(NGeneratorTiles)
-  val nGens = nGensPerTile * nGenTiles
+  val nGens = p(NGenerators)
   val genUncached = p(GenerateUncached)
   val genCached = p(GenerateCached)
   val genTimeout = 4096
@@ -127,7 +124,7 @@ class HellaCacheGenerator(id: Int)
     val mem = new HellaCacheIO
   }
 
-  val timeout = Timer(genTimeout, io.mem.req.fire(), io.mem.resp.fire())
+  val timeout = Timer(genTimeout, io.mem.req.fire(), io.mem.resp.valid)
   assert(!timeout, s"Cached generator ${id} timed out waiting for response")
 
   val (s_start :: s_write :: s_read :: s_finished :: Nil) = Enum(Bits(), 4)
@@ -169,3 +166,30 @@ class HellaCacheGenerator(id: Int)
     io.mem.resp.bits.data === req_data,
     s"Received incorrect data in cached generator ${id}")
 }
+
+class GeneratorTest(id: Int)(implicit val p: Parameters)
+    extends GroundTest()(p) with HasGeneratorParams {
+
+  val gen_finished = Wire(Vec(2, Bool()))
+
+  if (genUncached) {
+    val uncacheGen = Module(new UncachedTileLinkGenerator(id))
+    io.mem <> uncacheGen.io.mem
+    gen_finished(0) := uncacheGen.io.finished
+  } else {
+    io.mem.acquire.valid := Bool(false)
+    io.mem.grant.ready := Bool(false)
+    gen_finished(0) := Bool(true)
+  }
+
+  if (genCached) {
+    val cacheGen = Module(new HellaCacheGenerator(id))
+    io.cache <> cacheGen.io.mem
+    gen_finished(1) := cacheGen.io.finished
+  } else {
+    io.cache.req.valid := Bool(false)
+    gen_finished(1) := Bool(true)
+  }
+
+  io.finished := gen_finished.reduce(_ && _)
+}
diff --git a/groundtest/src/main/scala/tile.scala b/groundtest/src/main/scala/tile.scala
index 789664d5..deabec34 100644
--- a/groundtest/src/main/scala/tile.scala
+++ b/groundtest/src/main/scala/tile.scala
@@ -3,9 +3,12 @@ package groundtest
 import Chisel._
 import rocket._
 import uncore._
-import junctions.SMIIO
+import junctions.{SMIIO, ParameterizedBundle}
 import scala.util.Random
-import cde.Parameters
+import cde.{Parameters, Field}
+
+case object BuildGroundTest extends Field[(Int, Parameters) => GroundTest]
+case object GroundTestMaxXacts extends Field[Int]
 
 /** A "cache" that responds to probe requests with a release indicating
  *  the block is not present */
@@ -61,58 +64,28 @@ class CSRHandler(implicit val p: Parameters) extends Module {
   }
 }
 
-class GeneratorTile(id: Int, resetSignal: Bool)
-                   (implicit val p: Parameters) extends Tile(resetSignal)(p)
-                   with HasGeneratorParams {
-
-  val gen_finished = Wire(Vec(2 * nGensPerTile, Bool()))
-
-  if (genUncached) {
-    val uncacheArb = Module(new ClientUncachedTileLinkIOArbiter(nGensPerTile))
-
-    for (i <- 0 until nGensPerTile) {
-      val genid = id * nGensPerTile + i
-      val uncacheGen = Module(new UncachedTileLinkGenerator(genid))
-      uncacheArb.io.in(i) <> uncacheGen.io.mem
-      gen_finished(2 * i) := uncacheGen.io.finished
-    }
-
-    io.uncached(0) <> uncacheArb.io.out
-  } else {
-    io.uncached(0).acquire.valid := Bool(false)
-    io.uncached(0).grant.ready := Bool(false)
-    for (i <- 0 until nGensPerTile) { gen_finished(2 * i) := Bool(true) }
-  }
-
-  if (genCached) {
-    val cacheArb = Module(new HellaCacheArbiter(nGensPerTile)(dcacheParams))
-    val cache = Module(new HellaCache()(dcacheParams))
-
-    for (i <- 0 until nGensPerTile) {
-      val genid = id * nGensPerTile + i
-      val cacheGen = Module(new HellaCacheGenerator(genid)(dcacheParams))
-      val cacheIF = Module(new SimpleHellaCacheIF()(dcacheParams))
-      cacheIF.io.requestor <> cacheGen.io.mem
-      cacheArb.io.requestor(i) <> cacheIF.io.cache
-      gen_finished(2 * i + 1) := cacheGen.io.finished
-    }
-
-    cache.io.ptw.req.ready := Bool(false)
-    cache.io.ptw.resp.valid := Bool(false)
-    cache.io.cpu <> cacheArb.io.mem
-
-    assert(!cache.io.ptw.req.valid, 
-      "Cache should not be using virtual addressing")
-
-    io.cached(0) <> cache.io.mem
-  } else {
-    io.cached(0) <> Module(new DummyCache).io
-    for (i <- 0 until nGensPerTile) { gen_finished(2 * i + 1) := Bool(true) }
-  }
-
-  val all_done = gen_finished.reduce(_ && _)
-  val csr = Module(new CSRHandler)
-  csr.io.finished := all_done
-  csr.io.csr <> io.host.csr
+class GroundTestIO(implicit p: Parameters) extends ParameterizedBundle()(p) {
+  val cache = new HellaCacheIO
+  val mem = new ClientUncachedTileLinkIO
+  val finished = Bool(OUTPUT)
 }
 
+abstract class GroundTest(implicit p: Parameters) extends Module {
+  val io = new GroundTestIO
+}
+
+class GroundTestTile(id: Int, resetSignal: Bool)
+                   (implicit val p: Parameters) extends Tile(resetSignal)(p) {
+
+  val dcache = Module(new HellaCache()(dcacheParams))
+  val dcacheIF = Module(new SimpleHellaCacheIF()(dcacheParams))
+  val test = p(BuildGroundTest)(id, dcacheParams)
+  io.uncached.head <> test.io.mem
+  dcacheIF.io.requestor <> test.io.cache
+  dcache.io.cpu <> dcacheIF.io.cache
+  io.cached.head <> dcache.io.mem
+
+  val csr = Module(new CSRHandler)
+  csr.io.finished := test.io.finished
+  csr.io.csr <> io.host.csr
+}