diff --git a/rocket b/rocket
index 6c0e1caa..abda4649 160000
--- a/rocket
+++ b/rocket
@@ -1 +1 @@
-Subproject commit 6c0e1caaf535ab8cf24368e0d023ef36c35a3ccd
+Subproject commit abda4649cf353a8dca1fdd2cc536cb015a6237b3
diff --git a/src/main/scala/Configs.scala b/src/main/scala/Configs.scala
index ebc16589..fd8fe032 100644
--- a/src/main/scala/Configs.scala
+++ b/src/main/scala/Configs.scala
@@ -153,6 +153,7 @@ class DefaultConfig extends Config (
       }
       case BuildRoCC => Nil
       case RoccNMemChannels => site(BuildRoCC).map(_.nMemChannels).foldLeft(0)(_ + _)
+      case RoccNPTWPorts => site(BuildRoCC).map(_.nPTWPorts).foldLeft(0)(_ + _)
       case RoccNCSRs => site(BuildRoCC).map(_.csrs.size).foldLeft(0)(_ + _)
       case UseDma => false
       case UseStreamLoopback => false
@@ -396,7 +397,8 @@ class WithRoccExample extends Config(
         generator = (p: Parameters) => Module(new AccumulatorExample()(p))),
       RoccParameters(
         opcodes = OpcodeSet.custom1,
-        generator = (p: Parameters) => Module(new TranslatorExample()(p))),
+        generator = (p: Parameters) => Module(new TranslatorExample()(p)),
+        nPTWPorts = 1),
       RoccParameters(
         opcodes = OpcodeSet.custom2,
         generator = (p: Parameters) => Module(new CharacterCountExample()(p))))
@@ -413,6 +415,7 @@ class WithDmaController extends Config(
         RoccParameters(
           opcodes = OpcodeSet.custom2,
           generator = (p: Parameters) => Module(new DmaController()(p)),
+          nPTWPorts = 1,
           csrs = Seq.range(
             DmaCtrlRegNumbers.CSR_BASE,
             DmaCtrlRegNumbers.CSR_END)))