riscv/rocket-chip
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Avoid VM exceptions in groundtest by setting Accessed bit

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This commit is contained in:
Andrew Waterman 2017-03-09 16:48:28 -08:00
parent 4f8f05d635
commit 63f8ce36f6
1 changed files with 1 additions and 1 deletions
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src/main/scala/groundtest/DummyPTW.scala
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@ -34,7 +34,7 @@ class DummyPTW(n: Int)(implicit p: Parameters) extends CoreModule()(p) {
s2_resp.pte.ppn := s2_ppn s2_resp.pte.ppn := s2_ppn
s2_resp.pte.reserved_for_software := UInt(0) s2_resp.pte.reserved_for_software := UInt(0)
s2_resp.pte.d := Bool(true) s2_resp.pte.d := Bool(true)
s2_resp.pte.a := Bool(false) s2_resp.pte.a := Bool(true)
s2_resp.pte.g := Bool(false) s2_resp.pte.g := Bool(false)
s2_resp.pte.u := Bool(true) s2_resp.pte.u := Bool(true)
s2_resp.pte.r := Bool(true) s2_resp.pte.r := Bool(true)