From 6176b348dc2241aa80a0dc007c589b8032d417cd Mon Sep 17 00:00:00 2001 From: Andrew Waterman Date: Tue, 7 Nov 2017 00:52:18 -0800 Subject: [PATCH] Invalidate TL error bit in D$ once progress is made --- src/main/scala/rocket/DCache.scala | 1 + 1 file changed, 1 insertion(+) diff --git a/src/main/scala/rocket/DCache.scala b/src/main/scala/rocket/DCache.scala index 2f14660c..dfa58812 100644 --- a/src/main/scala/rocket/DCache.scala +++ b/src/main/scala/rocket/DCache.scala @@ -305,6 +305,7 @@ class DCacheModule(outer: DCache) extends HellaCacheModule(outer) { } when (lrscCount > 0) { lrscCount := lrscCount - 1 } when ((s2_valid_masked && lrscCount > 0) || io.cpu.invalidate_lr) { lrscCount := 0 } + when (s2_valid_masked || io.cpu.invalidate_lr) { tl_error_valid := false } // don't perform data correction if it might clobber a recent store val s2_correct = s2_data_error && !any_pstore_valid && !RegNext(any_pstore_valid) && Bool(usingDataScratchpad)